{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T23:39:27Z","timestamp":1648597167930},"reference-count":3,"publisher":"World Scientific Pub Co Pte Lt","issue":"06","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2007,12]]},"abstract":"<jats:p> Security of cryptographic circuits is a major concern. Smartcards are targeted by sophisticated attacks like fault attacks that combine physical disturbance and cryptanalysis. We propose a methodology and a tool (PAFI) to analyze the robustness of circuits under fault attacks using fault injection in simulation. The number of injections is reduced by taking into account the function of the latches in the whole circuit. We tested a circuit implementing the cryptosystem AES and showed that our approach reduces the number of fault injections to be performed (- 80%). Moreover, most of the selected injection points are the ones that lead to known fault attacks (95%). <\/jats:p>","DOI":"10.1142\/s0218126607004040","type":"journal-article","created":{"date-parts":[[2008,5,21]],"date-time":"2008-05-21T11:00:28Z","timestamp":1211367628000},"page":"883-894","source":"Crossref","is-referenced-by-count":1,"title":["SECURITY ANALYSIS OF AES USING FUNCTIONALITY FAULT MODEL"],"prefix":"10.1142","volume":"16","author":[{"given":"OLIVIER","family":"FAURAX","sequence":"first","affiliation":[{"name":"\u00c9cole des Mines de St \u00c9tienne \u2014 Site Georges Charpak, Laboratoire SESAM, Avenue des An\u00e9mones, 13120 Gardanne, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"TRAIAN","family":"MUNTEAN","sequence":"additional","affiliation":[{"name":"Universit\u00e9 de la M\u00e9diterran\u00e9e, Syst\u00e8mes Informatiques Communicants, 13288 Marseille, France"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf1","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-69053-0_4"},{"key":"rf10","doi-asserted-by":"publisher","DOI":"10.1109\/12.559803"},{"key":"rf15","first-page":"967","volume":"49","author":"Yen S.-M.","journal-title":"IEEE Trans. Comput."}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126607004040","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T17:56:08Z","timestamp":1565200568000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126607004040"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,12]]},"references-count":3,"journal-issue":{"issue":"06","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2007,12]]}},"alternative-id":["10.1142\/S0218126607004040"],"URL":"https:\/\/doi.org\/10.1142\/s0218126607004040","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2007,12]]}}}