{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,5]],"date-time":"2022-04-05T22:31:39Z","timestamp":1649197899589},"reference-count":19,"publisher":"World Scientific Pub Co Pte Lt","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2009,6]]},"abstract":"<jats:p>This paper presents a low power CMOS analog integrated circuit of a Takagi\u2013Sugeno fuzzy logic controller with voltage\/voltage interface, small chip area, relatively high accuracy and medium speed, which is composed of several improved functional blocks. Z-shaped, Gaussian and S-shaped membership function circuits with compact structures are designed, performing well with low power, high speed and small areas. A current minimization circuit is provided with high accuracy and high speed. A follower-aggregation defuzzification block composed of several multipliers for center of gravity (COG) defuzzification is presented without using a division circuit. Based on these blocks, a two-input one-output singleton fuzzy controller with nine rules is designed under a CMOS 0.6 \u03bcm standard technology provided by CSMC. HSPICE simulation results show that this controller reaches an accuracy of \u00b13% with power consumption of only 3.5 mW (at \u00b12.5 V). The speed of this controller goes up to 0.625M Fuzzy Logic Inference per Second (FLIPS), which is fast enough for real-time control.<\/jats:p>","DOI":"10.1142\/s0218126609005009","type":"journal-article","created":{"date-parts":[[2009,6,2]],"date-time":"2009-06-02T10:11:24Z","timestamp":1243937484000},"page":"841-856","source":"Crossref","is-referenced-by-count":0,"title":["CMOS CIRCUIT DESIGN OF A TAKAGI-SUGENO FUZZY LOGIC CONTROLLER"],"prefix":"10.1142","volume":"18","author":[{"given":"WEIWEI","family":"SHAN","sequence":"first","affiliation":[{"name":"National ASIC System Engineering Research Center, Southeast University, Nanjing, 210096, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"YAN","family":"LIANG","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics, Tsinghua University, Beijing, 100084, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"DONGMING","family":"JIN","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics, Tsinghua University, Beijing, 100084, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf1","doi-asserted-by":"publisher","DOI":"10.1016\/S0019-9958(65)90241-X"},{"key":"rf2","doi-asserted-by":"publisher","DOI":"10.1016\/0005-1098(77)90050-4"},{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1109\/91.366571"},{"key":"rf4","first-page":"720","volume":"63","author":"Yamakawa T.","journal-title":"Trans. IEICE"},{"key":"rf6","doi-asserted-by":"crossref","first-page":"161","DOI":"10.3233\/IFS-1996-4207","volume":"4","author":"Patyra M. J.","journal-title":"J. Intell. Fuzzy Syst."},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1109\/4.278355"},{"key":"rf8","doi-asserted-by":"publisher","DOI":"10.1109\/91.544303"},{"key":"rf9","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126605002830"},{"key":"rf10","doi-asserted-by":"publisher","DOI":"10.1109\/41.808001"},{"key":"rf11","doi-asserted-by":"crossref","unstructured":"C.\u00a0Dualibe, M.\u00a0Verleysen and P.\u00a0Jespers, Design of Analog Fuzzy Logic Controllers in CMOS Technologies-Implementation, Test and Application (Kluwer Academic Publishers, New York, 2003)\u00a0pp. 107\u2013154.","DOI":"10.1007\/0-306-48014-X_4"},{"key":"rf12","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2003.816379"},{"key":"rf13","doi-asserted-by":"publisher","DOI":"10.1109\/TFUZZ.2003.817841"},{"key":"rf14","volume-title":"Fuzzy Systems Design Principles: Building Fuzzy IF-THEN Rules Bases","author":"Sheldon L. T.","year":"1990"},{"key":"rf15","doi-asserted-by":"publisher","DOI":"10.1109\/21.52551"},{"key":"rf16","first-page":"129","volume":"2","author":"Sheu B. J.","journal-title":"IEEE Trans. VLSI Syst."},{"key":"rf17","first-page":"83","volume":"32","author":"Alci M.","journal-title":"Analog. Integr. Circuit"},{"key":"rf18","doi-asserted-by":"publisher","DOI":"10.1109\/12.53598"},{"key":"rf20","first-page":"1550","volume":"45","author":"Han G.","journal-title":"IEEE Trans. Circuits Syst. II"},{"key":"rf21","first-page":"1433","volume":"24","author":"Duinmaijer A.","journal-title":"IEEE J. Solid-State Circuits"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126609005009","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,5,19]],"date-time":"2020-05-19T01:55:46Z","timestamp":1589853346000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126609005009"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,6]]},"references-count":19,"journal-issue":{"issue":"04","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2009,6]]}},"alternative-id":["10.1142\/S0218126609005009"],"URL":"https:\/\/doi.org\/10.1142\/s0218126609005009","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2009,6]]}}}