{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,10]],"date-time":"2026-03-10T13:10:14Z","timestamp":1773148214654,"version":"3.50.1"},"reference-count":6,"publisher":"World Scientific Pub Co Pte Lt","issue":"03","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2009,5]]},"abstract":"<jats:p> This paper presents a control circuit which regulates the current consumption of integrated circuits using current injection and voltage scaling techniques. The control circuit can be integrated with smart cards as a countermeasure against power analysis attacks and electromagnetic emanation analysis attacks. We have designed the proposed circuit in 0.18 \u03bcm CMOS technology at 1.8 V power supply. The simulation results show that the circuit controls the current through the power supply pin of a model of a smart card microcontroller and attenuates the peak-to-peak current variations by 95%. The power dissipation overhead of the control circuit is less than 20% of the original power dissipation of the smart card microcontroller. Comparing the layout area of the proposed circuit with that of an ASIC 3-DES algorithm in the same technology shows that the control circuit only constitutes 4% of the cryptographic processor. The proposed circuit proves to be especially useful for smart cards and small portable devices, where power dissipation and chip area are critical. <\/jats:p>","DOI":"10.1142\/s0218126609005332","type":"journal-article","created":{"date-parts":[[2009,5,12]],"date-time":"2009-05-12T10:31:50Z","timestamp":1242124310000},"page":"565-579","source":"Crossref","is-referenced-by-count":2,"title":["ON-CHIP POWER-EFFICIENT CURRENT FLATTENING CIRCUIT"],"prefix":"10.1142","volume":"18","author":[{"given":"HALEH","family":"VAHEDI","sequence":"first","affiliation":[{"name":"School of Engineering, University of Guelph, Guelph, Ontario, Canada N1G 2W1, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"STEFANO","family":"GREGORI","sequence":"additional","affiliation":[{"name":"School of Engineering, University of Guelph, Guelph, Ontario, Canada N1G 2W1, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"RADU","family":"MURESAN","sequence":"additional","affiliation":[{"name":"School of Engineering, University of Guelph, Guelph, Ontario, Canada N1G 2W1, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.855939"},{"key":"rf5","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2004.25"},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.878344"},{"key":"rf10","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cds:20010441"},{"key":"rf11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2003.822429"},{"key":"rf17","doi-asserted-by":"publisher","DOI":"10.1109\/4.910496"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126609005332","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T03:53:56Z","timestamp":1565150036000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126609005332"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,5]]},"references-count":6,"journal-issue":{"issue":"03","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2009,5]]}},"alternative-id":["10.1142\/S0218126609005332"],"URL":"https:\/\/doi.org\/10.1142\/s0218126609005332","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2009,5]]}}}