{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,9]],"date-time":"2025-09-09T22:01:42Z","timestamp":1757455302638},"reference-count":11,"publisher":"World Scientific Pub Co Pte Lt","issue":"02","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2010,4]]},"abstract":"<jats:p> This paper presents the design and performance analysis of the dual-rail encoded and sense-amplifier structured 2N\u20132P, 2N\u20132N2P, IPGL and PFAL quasi-adiabatic circuits operated by two-phase sinusoidal power-clock sources. The energetics of these families are studied for varying power-clock voltages. The drivability characteristics are evaluated using capacitive loads. The performance validation is made through 8-bit and 16-bit adder circuits using an integrated power-clock generator. Optimal adiabatic gain values are achieved for 2N\u20132N2P and IPGL circuits across a wide frequency range. Energy recovery comparison between the four-phase ramp and two-phase sine power-clocks is made. The results demonstrate the efficiency of sinusoidal power clock at both the high and the low frequency ranges of operation. The circuits were designed using 180 nm CMOS technology. <\/jats:p>","DOI":"10.1142\/s0218126610006098","type":"journal-article","created":{"date-parts":[[2010,3,3]],"date-time":"2010-03-03T04:31:10Z","timestamp":1267590670000},"page":"335-347","source":"Crossref","is-referenced-by-count":20,"title":["TWO-PHASE SINUSOIDAL POWER-CLOCKED QUASI-ADIABATIC LOGIC CIRCUITS"],"prefix":"10.1142","volume":"19","author":[{"given":"V. S.","family":"KANCHANA BHAASKARAN","sequence":"first","affiliation":[{"name":"Department of Electronics and Communication Engineering, SSN College of Engineering, Kalavakkam \u2013 603110, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J. P.","family":"RAINA","sequence":"additional","affiliation":[{"name":"School of Electrical Sciences, VIT University, Vellore, Tamil Nadu, India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf1","doi-asserted-by":"publisher","DOI":"10.1109\/4.126534"},{"key":"rf2","doi-asserted-by":"publisher","DOI":"10.1109\/92.335009"},{"key":"rf4","doi-asserted-by":"publisher","DOI":"10.1049\/el:19961272"},{"key":"rf5","volume":"12","author":"Blotti A.","journal-title":"IEEE Trans. VLSI Systems"},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1109\/92.863629"},{"key":"rf9","first-page":"52","volume":"9","author":"Kim S.","journal-title":"IEEE Trans. VLSI Syst."},{"key":"rf10","first-page":"865","volume":"35","author":"Lim J.","journal-title":"IEEE J. Solid-State Circuits"},{"key":"rf12","first-page":"343","author":"Lau K. K. T.","journal-title":"Electron. Lett."},{"key":"rf13","doi-asserted-by":"publisher","DOI":"10.1049\/el:20060981"},{"key":"rf14","first-page":"651","volume":"54","author":"Kim S.","journal-title":"IEEE Trans. Comput."},{"key":"rf16","doi-asserted-by":"publisher","DOI":"10.1166\/jolpe.2008.264"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126610006098","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T23:52:44Z","timestamp":1565135564000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126610006098"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,4]]},"references-count":11,"journal-issue":{"issue":"02","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2010,4]]}},"alternative-id":["10.1142\/S0218126610006098"],"URL":"https:\/\/doi.org\/10.1142\/s0218126610006098","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,4]]}}}