{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T12:13:29Z","timestamp":1767183209562},"reference-count":5,"publisher":"World Scientific Pub Co Pte Lt","issue":"01","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2011,2]]},"abstract":"<jats:p> The scaling of transistor sizes has resulted in dramatic increase of leakage currents. The sub-threshold and gate leakages have now become a major contributor to total power dissipations. This paper presents two flip-flops based on dual-threshold CMOS and multiple leakage reduction techniques to reduce their leakage dissipations. In the DT-TG FF (Dual-Threshold Transmission Gate Flip-Flop), some transistors on non-critical paths use high-threshold devices to reduce their leakage currents, while the other transistors on critical paths use low-threshold devices to maintain performance. The MLRT FF (Multiple Leakage Reduction Technique Flip-Flop) uses P-type CMOS techniques, MTCMOS (Multi-Threshold CMOS) power-gating and dual-threshold technique to reduce both sub-threshold and gate leakage dissipations. Taken as an example, a practical sequential system realized with the two low-leakage flip-flops is demonstrated using a mode-5 \u00d7 5 \u00d7 5 counter. The simulation results show that the two flip-flops achieve considerable leakage reductions. <\/jats:p>","DOI":"10.1142\/s0218126611007128","type":"journal-article","created":{"date-parts":[[2011,1,20]],"date-time":"2011-01-20T10:54:54Z","timestamp":1295520894000},"page":"147-162","source":"Crossref","is-referenced-by-count":10,"title":["LOW-LEAKAGE FLIP-FLOPS BASED ON DUAL-THRESHOLD AND MULTIPLE LEAKAGE REDUCTION TECHNIQUES"],"prefix":"10.1142","volume":"20","author":[{"given":"WEIQIANG","family":"ZHANG","sequence":"first","affiliation":[{"name":"Faculty of Information Science and Technology, Ningbo University, Ningbo City, 315211, China"}]},{"given":"LI","family":"SU","sequence":"additional","affiliation":[{"name":"Faculty of Information Science and Technology, Ningbo University, Ningbo City, 315211, China"}]},{"given":"YU","family":"ZHANG","sequence":"additional","affiliation":[{"name":"Faculty of Information Science and Technology, Ningbo University, Ningbo City, 315211, China"}]},{"given":"LINFENG","family":"LI","sequence":"additional","affiliation":[{"name":"Faculty of Information Science and Technology, Ningbo University, Ningbo City, 315211, China"}]},{"given":"JIANPING","family":"HU","sequence":"additional","affiliation":[{"name":"Faculty of Information Science and Technology, Ningbo University, Ningbo City, 315211, China"}]}],"member":"219","published-online":{"date-parts":[[2012,4,30]]},"reference":[{"key":"rf1","first-page":"68","volume":"38","author":"Kim N. S.","journal-title":"Computer"},{"key":"rf2","first-page":"509","volume":"88","author":"Fallah F.","journal-title":"IEICE Trans. Electron."},{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1587\/elex.5.556"},{"key":"rf5","first-page":"2157","volume":"7","author":"Heo S.","journal-title":"J. Semiconductor Technol. Sci."},{"key":"rf8","first-page":"617","volume":"4","author":"Peiravi A.","journal-title":"World Appl. Sci. J."}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126611007128","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T17:14:24Z","timestamp":1565111664000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126611007128"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,2]]},"references-count":5,"journal-issue":{"issue":"01","published-online":{"date-parts":[[2012,4,30]]},"published-print":{"date-parts":[[2011,2]]}},"alternative-id":["10.1142\/S0218126611007128"],"URL":"https:\/\/doi.org\/10.1142\/s0218126611007128","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,2]]}}}