{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,1]],"date-time":"2024-09-01T05:06:01Z","timestamp":1725167161270},"reference-count":26,"publisher":"World Scientific Pub Co Pte Ltd","issue":"03","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2011,5]]},"abstract":"<jats:p>There are several possible implementations of artificial neural network that are based either on software or hardware systems. Software implementations are rather inefficient due to the fact that the intrinsic parallelism of the underlying computation is usually not taken advantage of in a mono-processor kind of computing system. Existing hardware implementations of ANNs are efficient as the dedicated datapath used is optimized and the hardware is usually parallel. Hardware implementations of ANNs may be either digital, analog, or even hybrid. Digital implementations of ANNs tend to be of high complexity, thus of high cost, and somehow imprecise due to the use of lookup table for the activation function. On the other hand, analog implementation of ANNs are generally very simple and much more precise. In this paper, we focus on possible analog implementations of ANNs. The neuron is based on a simple operational amplifier. The reviewed implementations allow for the use of both negative and positive synaptic weights. An alternative implementation permits the realization of the training process.<\/jats:p>","DOI":"10.1142\/s0218126611007347","type":"journal-article","created":{"date-parts":[[2011,4,13]],"date-time":"2011-04-13T09:52:45Z","timestamp":1302688365000},"page":"349-373","source":"Crossref","is-referenced-by-count":7,"title":["ANALOG HARDWARE IMPLEMENTATIONS OF ARTIFICIAL NEURAL NETWORKS"],"prefix":"10.1142","volume":"20","author":[{"given":"NADIA","family":"NEDJAH","sequence":"first","affiliation":[{"name":"Department of Electronics Engineering and Telecommunications, Faculty of Engineering, State University of Rio de Janeiro, Brazil"}]},{"given":"RODRIGO MARTINS","family":"DA SILVA","sequence":"additional","affiliation":[{"name":"Department of Electronics Engineering and Telecommunications, Faculty of Engineering, State University of Rio de Janeiro, Brazil"}]},{"given":"LUIZA DE MACEDO","family":"MOURELLE","sequence":"additional","affiliation":[{"name":"Department of Systems Engineering and Computation, Faculty of Engineering, State University of Rio de Janeiro, Brazil"}]}],"member":"219","published-online":{"date-parts":[[2012,4,30]]},"reference":[{"key":"rf2","volume-title":"Connectionism and the Mind: Parallel Processing, Dynamics, and Evolution in Networks","author":"Bechtel W.","year":"1991"},{"key":"rf3","doi-asserted-by":"crossref","DOI":"10.1093\/oso\/9780198538493.001.0001","volume-title":"Neural Networks for Pattern Recognition","author":"Bishop C. M.","year":"1995"},{"key":"rf4","doi-asserted-by":"publisher","DOI":"10.1109\/41.334585"},{"key":"rf5","volume-title":"Dispositivos Eletr\u00f4nicos e Teoria de Circuitos","author":"Boylestad R. L.","year":"2004"},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-05099-6"},{"key":"rf8","doi-asserted-by":"publisher","DOI":"10.1109\/12.954505"},{"key":"rf9","doi-asserted-by":"publisher","DOI":"10.1109\/12.954506"},{"key":"rf10","volume-title":"Fuzzy Logic and Neural Network Handbook","author":"Chen C. H.","year":"2003"},{"key":"rf11","doi-asserted-by":"publisher","DOI":"10.1109\/3477.826944"},{"key":"rf13","doi-asserted-by":"publisher","DOI":"10.1049\/el:19930052"},{"key":"rf14","doi-asserted-by":"publisher","DOI":"10.1109\/72.165600"},{"key":"rf15","first-page":"37","volume":"2","author":"Gaines B. R.","journal-title":"Adv. Inform. Syst. Sci."},{"key":"rf16","volume-title":"Neural networks \u2014 A Comprehensive Foundation","author":"Haykin S.","year":"1999"},{"key":"rf17","doi-asserted-by":"publisher","DOI":"10.1002\/9780470127896"},{"key":"rf19","first-page":"2396","volume":"66","author":"LeCun Y.","journal-title":"Phys. Rev. Lett."},{"key":"rf20","first-page":"115","volume":"7","author":"McCulloch W.","journal-title":"Bull. Math. Biophys."},{"key":"rf21","volume-title":"Integrated Electronics: Analog and Digital Circuits and Systems","author":"Millman J.","year":"1972"},{"key":"rf22","doi-asserted-by":"publisher","DOI":"10.1007\/s00521-007-0086-x"},{"key":"rf23","doi-asserted-by":"publisher","DOI":"10.1016\/j.neucom.2006.11.032"},{"key":"rf24","doi-asserted-by":"publisher","DOI":"10.1016\/j.neucom.2008.06.027"},{"key":"rf25","first-page":"475","volume":"5768","author":"Nedjah N.","journal-title":"Lect. Notes Comp. Sci."},{"key":"rf26","doi-asserted-by":"publisher","DOI":"10.1016\/S0925-2312(98)00069-1"},{"key":"rf27","volume-title":"Microeletr\u00f4nica","author":"Sedra A. S.","year":"1999"},{"key":"rf28","volume-title":"FPGA-Based System Design","author":"Wolf W.","year":"2004"},{"key":"rf29","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2006.888684"},{"key":"rf30","volume-title":"Introduction to Artificial Neural Systems","author":"Zurada J. M.","year":"1992"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126611007347","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,4,6]],"date-time":"2024-04-06T03:23:11Z","timestamp":1712373791000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126611007347"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":26,"journal-issue":{"issue":"03","published-online":{"date-parts":[[2012,4,30]]},"published-print":{"date-parts":[[2011,5]]}},"alternative-id":["10.1142\/S0218126611007347"],"URL":"https:\/\/doi.org\/10.1142\/s0218126611007347","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,5]]}}}