{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T13:58:56Z","timestamp":1648562336363},"reference-count":14,"publisher":"World Scientific Pub Co Pte Lt","issue":"03","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2011,5]]},"abstract":"<jats:p> In this paper, we devise an adaptive hardware architecture for ANNs that takes advantage of the dedicated adder blocks, commonly called MACs, to compute both the weighted sum and activation function. The proposed architecture requires a reduced silicon area considering the fact that the MACs come for free as these are FPGA's built-in hardcores and if not used, they cannot be optimized in the final design. The implementation uses integer fixed point arithmetic and operates with fractions to represent real numbers. The hardware is fast because it is massively parallel, yet it is compact as it has a single physical layer of neurons while the remaining are virtual. Besides, the proposed architecture is adaptive; so it is designed to adjust itself on-the-fly to the user-defined configuration of the neural network, i.e., the number of layers and neurons per layer as well as the topology of the ANN can be configured with no extra hardware changes nor any supplementary design effort. <\/jats:p>","DOI":"10.1142\/s0218126611007372","type":"journal-article","created":{"date-parts":[[2011,4,13]],"date-time":"2011-04-13T09:52:45Z","timestamp":1302688365000},"page":"417-437","source":"Crossref","is-referenced-by-count":0,"title":["HARDWARE IMPLEMENTATIONS OF MLP ARTIFICIAL NEURAL NETWORKS WITH CONFIGURABLE TOPOLOGY"],"prefix":"10.1142","volume":"20","author":[{"given":"RODRIGO MARTINS","family":"DA SILVA","sequence":"first","affiliation":[{"name":"Department of Electronics Engineering and Telecommunications, Faculty of Engineering, State University of Rio de Janeiro, Brazil"}]},{"given":"NADIA","family":"NEDJAH","sequence":"additional","affiliation":[{"name":"Department of Electronics Engineering and Telecommunications, Faculty of Engineering, State University of Rio de Janeiro, Brazil"}]},{"given":"LUIZA DE MACEDO","family":"MOURELLE","sequence":"additional","affiliation":[{"name":"Department of Systems Engineering and Computation, Faculty of Engineering, State University of Rio de Janeiro, Brazil"}]}],"member":"219","published-online":{"date-parts":[[2012,4,30]]},"reference":[{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1109\/41.334585"},{"key":"rf4","first-page":"1739","volume":"4","author":"Browne A.","journal-title":"Neural Comput."},{"key":"rf5","doi-asserted-by":"publisher","DOI":"10.1109\/12.954505"},{"key":"rf6","doi-asserted-by":"publisher","DOI":"10.1109\/12.954506"},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1162\/neco.1989.1.3.372"},{"key":"rf10","volume-title":"Fundamentals of Artificial Neural Networks","author":"Hassoun M. H.","year":"1995"},{"key":"rf11","volume-title":"Handbook of Neural Computation","author":"Moerland P.","year":"1996"},{"key":"rf12","volume-title":"VHDL: Analysis and Modeling of Digital Systems","author":"Navabi Z.","year":"1998"},{"key":"rf13","volume":"72","author":"Nedjah N.","journal-title":"J. Neural Comput. and Appl."},{"key":"rf14","first-page":"2171","volume":"16","author":"Nedjah N.","journal-title":"Neurocomputing"},{"key":"rf15","doi-asserted-by":"publisher","DOI":"10.1016\/0925-2312(94)00015-K"},{"key":"rf17","doi-asserted-by":"publisher","DOI":"10.1109\/4.508263"},{"key":"rf18","volume-title":"FPGA-based System Design","author":"Wolf W.","year":"2004"},{"key":"rf20","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2006.888684"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126611007372","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T17:16:12Z","timestamp":1565111772000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126611007372"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":14,"journal-issue":{"issue":"03","published-online":{"date-parts":[[2012,4,30]]},"published-print":{"date-parts":[[2011,5]]}},"alternative-id":["10.1142\/S0218126611007372"],"URL":"https:\/\/doi.org\/10.1142\/s0218126611007372","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,5]]}}}