{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T11:47:33Z","timestamp":1649072853526},"reference-count":12,"publisher":"World Scientific Pub Co Pte Lt","issue":"06","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2012,10]]},"abstract":"<jats:p> A novel ultra-low power two terminal zener voltage reference is designed and implemented. It realizes the concept of using sub-threshold region of the MOSFET to achieve a very low and stable output voltage within a two terminal circuit topology. This proposed voltage reference was fabricated with Global Foundries 0.18-\u03bcm CMOS process, consuming only a very small die area of 0.0009 mm<jats:sup>2<\/jats:sup>. Experimental results, carried out on five different silicon samples, explicitly show that it can yield a stable output voltage of 0.22 V at room temperature. It achieves an average temperature coefficient of 6.4 ppm\/\u00b0C across a wide temperature range from 0\u00b0C to 150\u00b0C with a standard deviation of 2 ppm\/\u00b0C. Furthermore, it achieves an ultra-low power consumption of 2 \u03bcW. The load regulation is 20 mV\/V. This simple and innovative two terminal device can be used to provide a very low and constant voltage difference between any two nodes in an analog circuit. <\/jats:p>","DOI":"10.1142\/s0218126612400178","type":"journal-article","created":{"date-parts":[[2012,11,25]],"date-time":"2012-11-25T21:36:14Z","timestamp":1353879374000},"page":"1240017","source":"Crossref","is-referenced-by-count":0,"title":["A NOVEL ULTRA-LOW POWER TWO-TERMINAL ZENER VOLTAGE REFERENCE"],"prefix":"10.1142","volume":"21","author":[{"given":"CHIANG LIANG","family":"KOK","sequence":"first","affiliation":[{"name":"VIRTUS \u2014 IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"LITER","family":"SIEK","sequence":"additional","affiliation":[{"name":"VIRTUS \u2014 IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"WEI MENG","family":"LIM","sequence":"additional","affiliation":[{"name":"VIRTUS \u2014 IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2012,12,3]]},"reference":[{"key":"rf1","volume-title":"Sub-Threshold Design for Ultra-Low Power Systems","author":"Wang A.","year":"2006"},{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050532"},{"key":"rf5","doi-asserted-by":"publisher","DOI":"10.1109\/4.991391"},{"key":"rf6","doi-asserted-by":"publisher","DOI":"10.1109\/4.933463"},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1109\/4.760378"},{"key":"rf8","doi-asserted-by":"publisher","DOI":"10.1109\/81.933328"},{"key":"rf9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.806266"},{"key":"rf12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2016204"},{"key":"rf13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1983.1052013"},{"key":"rf14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1976.1050818"},{"key":"rf18","doi-asserted-by":"publisher","DOI":"10.1109\/T-ED.1977.18987"},{"key":"rf19","volume-title":"CMOS Circuit Design, Layout, and Simulation","author":"Baker R. J.","year":"1998"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126612400178","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T14:18:36Z","timestamp":1565101116000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126612400178"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,10]]},"references-count":12,"journal-issue":{"issue":"06","published-online":{"date-parts":[[2012,12,3]]},"published-print":{"date-parts":[[2012,10]]}},"alternative-id":["10.1142\/S0218126612400178"],"URL":"https:\/\/doi.org\/10.1142\/s0218126612400178","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,10]]}}}