{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:57:03Z","timestamp":1759147023033},"reference-count":13,"publisher":"World Scientific Pub Co Pte Lt","issue":"06","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2012,10]]},"abstract":"<jats:p> In this paper we present a novel architecture for FFT implementation on FPGA. The proposed architecture based on radix-4 algorithm presents the advantage of a higher throughput and low area-delay product. In fact, the novelty consists on using a memory sharing and dividing technique along with parallel-in parallel-out Processing Elements (PE). The proposed architecture can perform N-point FFT using only 4\/3N delay elements and involves a latency of N\/4 cycles. Comparison in terms of hardware complexity and area-delay product with recent works presented in the literature and commercial IPs has been made to show the efficiency of the proposed design. Moreover, from the experimental results obtained from a FPGA prototype we find that the proposed design involves an execution time of 56% lower than that obtained with Xilinx IP core and an increase of 19% in the throughput by area ratio for 256-point FFT. <\/jats:p>","DOI":"10.1142\/s021812661240018x","type":"journal-article","created":{"date-parts":[[2012,11,26]],"date-time":"2012-11-26T02:36:14Z","timestamp":1353897374000},"page":"1240018","source":"Crossref","is-referenced-by-count":8,"title":["AREA-DELAY EFFICIENT FFT ARCHITECTURE USING PARALLEL PROCESSING AND NEW MEMORY SHARING TECHNIQUE"],"prefix":"10.1142","volume":"21","author":[{"given":"YOUSRI","family":"OUERHANI","sequence":"first","affiliation":[{"name":"Equipe Vision, Laboratoire L@bISEN de ISEN-Brest, 20 Rue Cuirasse Bretagne, CS 42807, 29228 Brest Cedex 2, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"MAHER","family":"JRIDI","sequence":"additional","affiliation":[{"name":"Equipe Vision, Laboratoire L@bISEN de ISEN-Brest, 20 Rue Cuirasse Bretagne, CS 42807, 29228 Brest Cedex 2, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"AYMAN","family":"ALFALOU","sequence":"additional","affiliation":[{"name":"Equipe Vision, Laboratoire L@bISEN de ISEN-Brest, 20 Rue Cuirasse Bretagne, CS 42807, 29228 Brest Cedex 2, France"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2012,12,3]]},"reference":[{"key":"rf1","doi-asserted-by":"publisher","DOI":"10.1090\/S0025-5718-1965-0178586-1"},{"key":"rf2","volume-title":"Discrete-Time Signal Processing","author":"Oppenheim A. V.","year":"1998"},{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1109\/TASSP.1986.1164804"},{"key":"rf4","doi-asserted-by":"publisher","DOI":"10.1109\/TASSP.1977.1162973"},{"key":"rf5","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2008.924637"},{"key":"rf8","doi-asserted-by":"publisher","DOI":"10.1109\/82.142032"},{"key":"rf12","volume-title":"Theory and Application of Digital Signal Processing","author":"Rabiner L. R.","year":"1975"},{"key":"rf13","first-page":"414","volume":"33","author":"Wold E. H.","journal-title":"IEEE Trans. Comput. C"},{"key":"rf14","doi-asserted-by":"publisher","DOI":"10.1109\/29.45545"},{"key":"rf16","volume":"2009","author":"Zhou B.","journal-title":"Int. J. Reconfigurable Comput."},{"key":"rf19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.875306"},{"key":"rf20","first-page":"993","volume":"23","author":"Despain A. M.","journal-title":"IEEE Trans. Comput. C"},{"key":"rf23","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2011.2135050"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S021812661240018X","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T18:18:38Z","timestamp":1565115518000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S021812661240018X"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,10]]},"references-count":13,"journal-issue":{"issue":"06","published-online":{"date-parts":[[2012,12,3]]},"published-print":{"date-parts":[[2012,10]]}},"alternative-id":["10.1142\/S021812661240018X"],"URL":"https:\/\/doi.org\/10.1142\/s021812661240018x","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,10]]}}}