{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,30]],"date-time":"2022-03-30T09:34:42Z","timestamp":1648632882139},"reference-count":5,"publisher":"World Scientific Pub Co Pte Lt","issue":"07","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2012,11]]},"abstract":"<jats:p> H.264 video decoder is a good choice for embedded video processing applications because of its higher compression ratio than MPEG2, although it has higher requirements of run-time computational resource. Multi-core system is the future of the embedded processor design for its power efficiency and multi-thread parallelization capability, and can be used to fit well with the requirements for such video processing algorithms. To simulate and evaluate the performance of these multi-core systems effectively, a design flow at the system level is developed, at the higher level, the combination of TLM language (SystemC) and shared-memory parallel programming model (OpenMP) is used for such transaction-level simulation, and at the lower level, a multi-core simulator based on the extension of the SimpleScalar 3.0 ToolSet is developed for the cycle-accurate level simulation. Compared with other high-level simulation methods, ours has the ability to realize the true-parallelization simulation. What is more, experiments show that such simulation methodology can effectively simulate these complex multi-core applications in a short time to get the appropriate core number and the task allocation strategy (much less than RTL-level simulation) and the results can get at less than 15% deviated from the ideal ones calculated based on Amadal's Law, so the parallelization strategy obtained from such simulation is the best one that can be further applied for the RTL-level design of the final multi-core system. <\/jats:p>","DOI":"10.1142\/s0218126612500582","type":"journal-article","created":{"date-parts":[[2012,12,12]],"date-time":"2012-12-12T08:47:46Z","timestamp":1355302066000},"page":"1250058","source":"Crossref","is-referenced-by-count":0,"title":["A \"NEAR-THE-BEST\" SYSTEM-LEVEL DESIGN METHODOLOGY OF MULTI-CORE H.264 VIDEO DECODER BASED ON THE PARALLELIZED MULTI-CORE SIMULATOR"],"prefix":"10.1142","volume":"21","author":[{"given":"BINGBING","family":"XIA","sequence":"first","affiliation":[{"name":"Department of Electronic Engineering, Tsinghua University, Beijing 100084, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"FEI","family":"QIAO","sequence":"additional","affiliation":[{"name":"Department of Electronic Engineering, Tsinghua University, Beijing 100084, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"ZIDONG","family":"DU","sequence":"additional","affiliation":[{"name":"Department of Electronic Engineering, Tsinghua University, Beijing 100084, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"DI","family":"ZHU","sequence":"additional","affiliation":[{"name":"Department of Electronic Engineering, Tsinghua University, Beijing 100084, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"HUAZHONG","family":"YANG","sequence":"additional","affiliation":[{"name":"Department of Electronic Engineering, Tsinghua University, Beijing 100084, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2013,1,17]]},"reference":[{"key":"rf1","first-page":"1576","volume":"19","author":"Lee G.","journal-title":"IEEE Trans. Circuit Syst. Video Technol."},{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1201\/9781420037562"},{"key":"rf4","volume-title":"System Design with SystemC","author":"Grotker T.","year":"2002"},{"key":"rf5","volume-title":"The Art of Parallel Programming","author":"Lester B.","year":"1993"},{"key":"rf17","doi-asserted-by":"publisher","DOI":"10.1145\/342001.339657"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126612500582","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T01:27:22Z","timestamp":1565141242000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126612500582"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,11]]},"references-count":5,"journal-issue":{"issue":"07","published-online":{"date-parts":[[2013,1,17]]},"published-print":{"date-parts":[[2012,11]]}},"alternative-id":["10.1142\/S0218126612500582"],"URL":"https:\/\/doi.org\/10.1142\/s0218126612500582","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,11]]}}}