{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,3]],"date-time":"2022-04-03T18:20:30Z","timestamp":1649010030086},"reference-count":22,"publisher":"World Scientific Pub Co Pte Lt","issue":"06","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2013,7]]},"abstract":"<jats:p> Hash functions are among the crucial modules of modern hardware cryptographic systems. These systems frequently operate in harsh and noisy environments where permanent and\/or transient faults are often causing erroneous authentication results and collapsing of the whole authentication procedure. Hence, their on-time detection is an urgent feature. In this paper, a systematic development flow towards totally self-checking (TSC) architectures of the most widely-used cryptographic hash families, SHA-1 and SHA-2, is proposed. Novel methods and techniques are introduced to determine the appropriate concurrent error detection scheme at high level avoiding gate-level implementations and comparisons. The resulted TSC architectures achieve 100% fault detection of odd erroneous bits, while, depending on the designer's choice, even number of erroneous bits can also be detected. Two representative functions of the above families, namely the SHA-1 and SHA-256, are used as case studies. For each of them, two TSC architectures (one un-optimized and one optimized for throughput) were developed via the proposed flow and implemented in TSMC 0.18 \u03bcm CMOS technology. The produced architectures are more efficient in terms of throughput\/area than the corresponding duplicated-with-checking ones by 19.5% and 23.8% regarding the un-optimized TSC SHA-1 and SHA-256 and by 20.2% and 24.6% regarding the optimized ones. <\/jats:p>","DOI":"10.1142\/s0218126613500497","type":"journal-article","created":{"date-parts":[[2013,7,12]],"date-time":"2013-07-12T09:01:50Z","timestamp":1373619710000},"page":"1350049","source":"Crossref","is-referenced-by-count":2,"title":["A SYSTEMATIC FLOW FOR DEVELOPING TOTALLY SELF-CHECKING ARCHITECTURES FOR SHA-1 AND SHA-2 CRYPTOGRAPHIC HASH FAMILIES"],"prefix":"10.1142","volume":"22","author":[{"given":"GEORGE S.","family":"ATHANASIOU","sequence":"first","affiliation":[{"name":"VLSI Design Laboratory, Electrical and Computer Engineering Department, University of Patras, Rio Campus, Patras 26500, Greece"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"GEORGE","family":"THEODORIDIS","sequence":"additional","affiliation":[{"name":"VLSI Design Laboratory, Electrical and Computer Engineering Department, University of Patras, Rio Campus, Patras 26500, Greece"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"COSTAS E.","family":"GOUTIS","sequence":"additional","affiliation":[{"name":"VLSI Design Laboratory, Electrical and Computer Engineering Department, University of Patras, Rio Campus, Patras 26500, Greece"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"HARRIS E.","family":"MICHAIL","sequence":"additional","affiliation":[{"name":"Electrical Engineering, Computer Engineering, and Informatics Department, Cyprus University of Technology, Lemesos 3036, Cyprus"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"TAKIS","family":"KASPARIS","sequence":"additional","affiliation":[{"name":"Electrical Engineering, Computer Engineering, and Informatics Department, Cyprus University of Technology, Lemesos 3036, Cyprus"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2013,7,29]]},"reference":[{"key":"rf3","volume-title":"Secure Electronic Transactions: Introduction and Technical Reference","author":"Loeb L.","year":"1998"},{"key":"rf4","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2004.20"},{"key":"rf6","volume-title":"SSL and TLS Essentials: Securing the Web","author":"Thomas S.","year":"2000"},{"key":"rf9","doi-asserted-by":"publisher","DOI":"10.1201\/9781439821916"},{"key":"rf13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74619-5_21"},{"key":"rf14","doi-asserted-by":"publisher","DOI":"10.1093\/ietfec\/e91-a.1.55"},{"key":"rf17","doi-asserted-by":"publisher","DOI":"10.1016\/B978-012373566-9.50004-5"},{"key":"rf19","doi-asserted-by":"crossref","unstructured":"H.\u00a0Feistel, Cryptography and Computer Privacy\u00a0228 (Scientific American, USA, 1973)\u00a0pp. 15\u201323.","DOI":"10.1038\/scientificamerican0573-15"},{"key":"rf21","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2003.1190590"},{"key":"rf22","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.90"},{"key":"rf24","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.804378"},{"key":"rf25","doi-asserted-by":"publisher","DOI":"10.1093\/comjnl\/bxm023"},{"key":"rf28","volume-title":"Self-Checking and Fault-Tolerant Digital Design","author":"Lala P.","year":"2000"},{"key":"rf29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2002.800526"},{"key":"rf32","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676478"},{"key":"rf33","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2000450"},{"key":"rf34","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-008-0168-8"},{"key":"rf36","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2008.15"},{"key":"rf37","doi-asserted-by":"publisher","DOI":"10.1145\/2133352.2133354"},{"key":"rf41","doi-asserted-by":"publisher","DOI":"10.1155\/2009\/205149"},{"key":"rf42","doi-asserted-by":"publisher","DOI":"10.1002\/spe.4380250705"},{"key":"rf44","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.49"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126613500497","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T15:28:19Z","timestamp":1565105299000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126613500497"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,7]]},"references-count":22,"journal-issue":{"issue":"06","published-online":{"date-parts":[[2013,7,29]]},"published-print":{"date-parts":[[2013,7]]}},"alternative-id":["10.1142\/S0218126613500497"],"URL":"https:\/\/doi.org\/10.1142\/s0218126613500497","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,7]]}}}