{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,5]],"date-time":"2022-04-05T14:57:34Z","timestamp":1649170654916},"reference-count":12,"publisher":"World Scientific Pub Co Pte Lt","issue":"03","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2014,3]]},"abstract":"<jats:p> In this paper, we present a comprehensive investigation of the influence of pipeline configurations on the performance of ASIC implementations of the Advanced Encryption Standard (AES) substitution box (S-box) based on a composite field structure. We consider pipeline configurations for the S-box with a typical composite field structure by varying the number of pipeline stages and the placement approach of pipeline registers. Besides the conventional placement approach at the component level of the S-box, we adopt a new placement approach at the gate level to achieve a fine-grained pipeline. The performance of the pipelined S-boxes is characterized based on a 90-nm standard cell CMOS technology. The characterization shows that there is notable performance improvement in timing, area, power and\/or energy efficiency by using an appropriate configuration compared with other configurations including non-pipelined implementations. These results are strong evidence that pipelined S-box implementations are not only suitable for high throughput AES implementations, but also valuable to resource-efficient AES implementations. In addition, it is also shown that pipelining provides many more performance options that allow more flexible implementation of the AES S-box compared with non-pipelined implementations. <\/jats:p>","DOI":"10.1142\/s0218126614500364","type":"journal-article","created":{"date-parts":[[2014,1,10]],"date-time":"2014-01-10T04:01:37Z","timestamp":1389326497000},"page":"1450036","source":"Crossref","is-referenced-by-count":0,"title":["PERFORMANCE CHARACTERIZATION OF PIPELINED S-BOX IMPLEMENTATIONS FOR THE ADVANCED ENCRYPTION STANDARD"],"prefix":"10.1142","volume":"23","author":[{"given":"CHENG","family":"WANG","sequence":"first","affiliation":[{"name":"Altera (Newfoundland Technology Center), Mount Pearl, NL, A1N4S9, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"HOWARD M.","family":"HEYS","sequence":"additional","affiliation":[{"name":"Faculty of Engineering, Memorial University of Newfoundland, St. Johns, NL, A1B3X5, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2014,3,2]]},"reference":[{"key":"rf2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.49"},{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1049\/iet-ifs:20060059"},{"key":"rf4","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-012-9395-0"},{"key":"rf6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.832943"},{"key":"rf10","author":"Wang C.","journal-title":"J. Signal Process. Syst."},{"key":"rf12","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-007-0158-2"},{"key":"rf18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.882217"},{"key":"rf21","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cds.2010.0435"},{"key":"rf26","volume-title":"Cryptography and Network Security","author":"Stallings W.","year":"2005"},{"key":"rf27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108131"},{"key":"rf28","volume-title":"Advanced ASIC Chip Synthesis Using Synopsys Design Compiler, Physical Compiler and Prime Time","author":"Bhatnagar H.","year":"2001"},{"key":"rf32","volume-title":"Low Power Methodology Manual: For System-on-Chip Design","author":"Keating M.","year":"2007"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126614500364","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T04:23:23Z","timestamp":1565151803000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126614500364"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,3]]},"references-count":12,"journal-issue":{"issue":"03","published-online":{"date-parts":[[2014,3,2]]},"published-print":{"date-parts":[[2014,3]]}},"alternative-id":["10.1142\/S0218126614500364"],"URL":"https:\/\/doi.org\/10.1142\/s0218126614500364","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,3]]}}}