{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,5,17]],"date-time":"2023-05-17T10:50:13Z","timestamp":1684320613316},"reference-count":7,"publisher":"World Scientific Pub Co Pte Lt","issue":"01","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2015,1]]},"abstract":"<jats:p> We present an unified explanation of the transconductance-to-drain current (g<jats:sub>m<\/jats:sub>\/I<jats:sub>D<\/jats:sub>)-based noise analysis in this paper. We show that both thermal noise coefficient (\u03b3) and device noise corner frequency (f<jats:sub> co <\/jats:sub>) are dependent on the g<jats:sub>m<\/jats:sub>\/I<jats:sub>D<\/jats:sub> of a transistor. We derive expressions to demonstrate the relationship between the normalized noise power spectral density technique and the technique based on \u03b3 and f<jats:sub> co <\/jats:sub>. We conclude this letter with examples to demonstrate the practical implication of our study. Our results show that while both techniques discussed in this letter can be used to compute noise numerically, using \u03b3 and f<jats:sub> co <\/jats:sub> to separate thermal noise from flicker noise provides additional insight for optimizing noise. <\/jats:p>","DOI":"10.1142\/s0218126615500103","type":"journal-article","created":{"date-parts":[[2014,9,30]],"date-time":"2014-09-30T01:23:58Z","timestamp":1412040238000},"page":"1550010","source":"Crossref","is-referenced-by-count":3,"title":["A Unified Explanation of g<sub>m<\/sub>\/I<sub>D<\/sub>-Based Noise Analysis"],"prefix":"10.1142","volume":"24","author":[{"given":"Jack","family":"Ou","sequence":"first","affiliation":[{"name":"Engineering Science, Sonoma State University, 1801 E. Cotati Ave, Rohnert Park, California 94928, United States"}]},{"given":"Pietro M.","family":"Ferreira","sequence":"additional","affiliation":[{"name":"DHS Department, IEMN UMR CNRS, Universite de Lille, Lille, France"}]}],"member":"219","published-online":{"date-parts":[[2014,11,10]]},"reference":[{"key":"rf1","doi-asserted-by":"publisher","DOI":"10.1109\/4.535416"},{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1049\/el.2011.3730"},{"key":"rf4","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2012.2208270"},{"key":"rf5","volume-title":"Operational and Modeling of the MOS Transistor","author":"Tsividis Y.","year":"1999"},{"key":"rf6","doi-asserted-by":"publisher","DOI":"10.1016\/S0026-2692(00)00105-1"},{"key":"rf7","volume-title":"Analog Design Essentials","author":"Sansen W.","year":"2008"},{"key":"rf8","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2009.2026483"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126615500103","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T20:16:55Z","timestamp":1565122615000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126615500103"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,11,10]]},"references-count":7,"journal-issue":{"issue":"01","published-online":{"date-parts":[[2014,11,10]]},"published-print":{"date-parts":[[2015,1]]}},"alternative-id":["10.1142\/S0218126615500103"],"URL":"https:\/\/doi.org\/10.1142\/s0218126615500103","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,11,10]]}}}