{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,4]],"date-time":"2024-07-04T12:34:43Z","timestamp":1720096483184},"reference-count":10,"publisher":"World Scientific Pub Co Pte Lt","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2015,4]]},"abstract":"<jats:p> This paper presents a 10-bit column-parallel single slope analog-to-digital converter (SS ADC) with a two-step time-to-digital converter (TDC) to overcome the long conversion time problem in conventional SS ADC for high-speed CMOS image sensors (CIS). The time interval proportional to the input signal is generated by a ramp generator and a comparator, which is digitized by a two-step TDC consisting of coarse and fine conversions to achieve a high-precision time-interval measurement. To mitigate the impact of propagation delay mismatch, a calibration circuit is also proposed to calibrate the delay skew within -T\/2 to T\/2. The proposed ADC is designed in 0.18 \u03bcm CMOS process. The power dissipation of each column circuit is 232 \u03bcW at supply voltages of 3.3 V for the analog circuits and 1.8 V for the digital blocks. The post simulation results indicate that the ADC achieves a SNDR of 60.89 dB (9.82 ENOB) and a SFDR of 79.98 dB at a conversion rate of 2 MS\/s after calibration, while the SNDR and SFDR are limited to 41.52 dB and 67.64 dB, respectively before calibration. The differential nonlinearity (DNL) and integral nonlinearity (INL) without calibration are +15.80\/-15.29 LSB and +1.68\/-15.34 LSB while they are reduced down to +0.75\/-0.25 LSB and +0.76\/-0.78 LSB with the proposed calibration. <\/jats:p>","DOI":"10.1142\/s0218126615500541","type":"journal-article","created":{"date-parts":[[2015,1,22]],"date-time":"2015-01-22T01:38:35Z","timestamp":1421890715000},"page":"1550054","source":"Crossref","is-referenced-by-count":5,"title":["A 10-Bit Column-Parallel Single Slope ADC Based on Two-Step TDC with Error Calibration for CMOS Image Sensors"],"prefix":"10.1142","volume":"24","author":[{"given":"Jiangtao","family":"Xu","sequence":"first","affiliation":[{"name":"School of Electronic Information Engineering, Tianjin University, 92 Weijin Road, Nankai District, Tianjin 300072, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jing","family":"Yu","sequence":"additional","affiliation":[{"name":"School of Electronic Information Engineering, Tianjin University, 92 Weijin Road, Nankai District, Tianjin 300072, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fujun","family":"Huang","sequence":"additional","affiliation":[{"name":"School of Electronic Information Engineering, Tianjin University, 92 Weijin Road, Nankai District, Tianjin 300072, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kaiming","family":"Nie","sequence":"additional","affiliation":[{"name":"School of Electronic Information Engineering, Tianjin University, 92 Weijin Road, Nankai District, Tianjin 300072, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2015,3,4]]},"reference":[{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126611007074"},{"key":"rf4","first-page":"2998","volume":"41","author":"Yoshihara S.","year":"2006","journal-title":"IEEE JSSCC"},{"key":"rf5","first-page":"1","author":"Nelson F. Z.","year":"2009","journal-title":"IEEE Microelectr. Electron Device"},{"key":"rf6","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2008.2011846"},{"key":"rf7","first-page":"2968","volume":"42","author":"Snoeij M. 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