{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T05:38:11Z","timestamp":1740116291025,"version":"3.37.3"},"reference-count":21,"publisher":"World Scientific Pub Co Pte Ltd","issue":"06","funder":[{"name":"The ministry of Education, Science Technology (MEST) and National Research Foundation of Korea (NRF)","award":["2012H1B8A2026055"],"award-info":[{"award-number":["2012H1B8A2026055"]}]},{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"publisher","award":["NRF-2015R1D1A1A01061237"],"award-info":[{"award-number":["NRF-2015R1D1A1A01061237"]}],"id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2016,6]]},"abstract":"<jats:p> This paper presents two power models for an asynchronous processor, A8051. The first one is a pipeline accurate model which models power consumption at each pipeline stage. The other one is a micro-architectural model which models power consumption at micro-operation level. Then, we demonstrate the feasibility of the proposed approach on an A8051 processor case study. The experimental results based on applying the proposed pipeline-accurate and micro-architectural power models on an A8051 processor demonstrate that the proposed power models have high accuracy with simulation times much faster than the conventional low-level power simulator. It also shows similar results compared to the conventional power model for a synchronous processor. Even though the simulation speeds for the proposed power models are approximately 100\u2013900 times faster than the low-level power simulator, the differences are less than 18% and 15%, respectively. Thus, the proposed power models can give a guide for SoC designers who want to integrate the asynchronous processor for low-power SoC design. <\/jats:p>","DOI":"10.1142\/s0218126616500572","type":"journal-article","created":{"date-parts":[[2016,2,24]],"date-time":"2016-02-24T06:53:15Z","timestamp":1456296795000},"page":"1650057","source":"Crossref","is-referenced-by-count":0,"title":["Power Modeling Framework for an Asynchronous Processor"],"prefix":"10.1142","volume":"25","author":[{"given":"Je-Hoon","family":"Lee","sequence":"first","affiliation":[{"name":"Division of Electronics, Information and Communication Engineering, Kangwon National University, 1 Joongang-ro, Samcheock, Gangwon, 245-711, Rep. of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2016,3,31]]},"reference":[{"key":"S0218126616500572BIB001","doi-asserted-by":"publisher","DOI":"10.1109\/5.362752"},{"key":"S0218126616500572BIB002","doi-asserted-by":"publisher","DOI":"10.1109\/5.740017"},{"key":"S0218126616500572BIB004","doi-asserted-by":"publisher","DOI":"10.1587\/transinf.E94.D.1547"},{"key":"S0218126616500572BIB006","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.28"},{"key":"S0218126616500572BIB007","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2008.2008054"},{"key":"S0218126616500572BIB008","doi-asserted-by":"publisher","DOI":"10.1587\/elex.5.87"},{"key":"S0218126616500572BIB009","doi-asserted-by":"publisher","DOI":"10.1007\/BF01130407"},{"key":"S0218126616500572BIB011","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2039153"},{"key":"S0218126616500572BIB014","doi-asserted-by":"publisher","DOI":"10.5194\/ars-2-215-2004"},{"key":"S0218126616500572BIB015","doi-asserted-by":"publisher","DOI":"10.1145\/268806.268810"},{"volume-title":"PowerMill Data Sheet","year":"1999","author":"Synopsys corporation","key":"S0218126616500572BIB016"},{"volume-title":"QuickPower","year":"1999","author":"Mentor Graphics Corporation","key":"S0218126616500572BIB017"},{"volume-title":"Cacti5.3","year":"2008","author":"Hewlett-Packard Laboratories","key":"S0218126616500572BIB020"},{"key":"S0218126616500572BIB021","first-page":"1250","volume":"2","author":"Banerjee N.","year":"2004","journal-title":"Proc. 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