{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,29]],"date-time":"2026-04-29T13:52:57Z","timestamp":1777470777911,"version":"3.51.4"},"reference-count":4,"publisher":"World Scientific Pub Co Pte Ltd","issue":"07","funder":[{"DOI":"10.13039\/501100001596","name":"Irish Research Council for Science, Engineering and Technology (IE)","doi-asserted-by":"publisher","award":["IRCGOIPG\/2013\/1132"],"award-info":[{"award-number":["IRCGOIPG\/2013\/1132"]}],"id":[{"id":"10.13039\/501100001596","id-type":"DOI","asserted-by":"publisher"}]},{"name":"European Union EM STRoNGTieS Program"},{"DOI":"10.13039\/501100001602","name":"Science Foundation Ireland","doi-asserted-by":"publisher","award":["12\/RC\/2302 and 14\/SP\/2740"],"award-info":[{"award-number":["12\/RC\/2302 and 14\/SP\/2740"]}],"id":[{"id":"10.13039\/501100001602","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2016,7]]},"abstract":"<jats:p> This work presents a novel technique for a high-speed implementation of the newly selected cryptographic hash function, Secure Hash Algorithm-3 (SHA-3) on Xilinx\u2019s Virtex-5 and Virtex-6 Field Programmable Gate Arrays (FPGAs). The proposed technique consists of a two-phase implementation approach. In the first phase, all steps of the SHA-3 core are logically combined, which helps to eliminate the intermediate states of core function, these states utilize more area and also slow the execution. The second phase deals with the hardware implementation of the first phase equations using Xilinx Look-Up-Table (LUT) primitives. This two phase implementation technique results in a throughput of 19.241[Formula: see text]Gbps on a Virtex-6 FPGA; this is the highest reported throughput to date for an FPGA implementation of SHA-3. This high throughput makes this technique ideally suited for the provision of Bump In The Wire (BITW) security for Internet of Things (IoT) applications. <\/jats:p>","DOI":"10.1142\/s0218126616500699","type":"journal-article","created":{"date-parts":[[2016,3,7]],"date-time":"2016-03-07T06:50:49Z","timestamp":1457333449000},"page":"1650069","source":"Crossref","is-referenced-by-count":10,"title":["High Speed Implementation of a SHA-3 Core on Virtex-5 and Virtex-6 FPGAs"],"prefix":"10.1142","volume":"25","author":[{"given":"Muzaffar","family":"Rao","sequence":"first","affiliation":[{"name":"Department of Electronic and Computer Engineering, University of Limerick, Limerick, Ireland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Thomas","family":"Newe","sequence":"additional","affiliation":[{"name":"Department of Electronic and Computer Engineering, University of Limerick, Limerick, Ireland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ian","family":"Grout","sequence":"additional","affiliation":[{"name":"Department of Electronic and Computer Engineering, University of Limerick, Limerick, Ireland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Avijit","family":"Mathur","sequence":"additional","affiliation":[{"name":"Department of Electronic and Computer Engineering, University of Limerick, Limerick, Ireland"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2016,4,22]]},"reference":[{"key":"S0218126616500699BIB004","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126606003362"},{"key":"S0218126616500699BIB005","doi-asserted-by":"publisher","DOI":"10.1016\/j.compeleceng.2011.07.010"},{"key":"S0218126616500699BIB008","first-page":"2388","volume":"6","author":"Latif K.","year":"2012","journal-title":"KSII Trans. Internet Inform. Syst."},{"key":"S0218126616500699BIB011","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2128353"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126616500699","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,21]],"date-time":"2019-09-21T11:37:44Z","timestamp":1569065864000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126616500699"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,4,22]]},"references-count":4,"journal-issue":{"issue":"07","published-online":{"date-parts":[[2016,4,22]]},"published-print":{"date-parts":[[2016,7]]}},"alternative-id":["10.1142\/S0218126616500699"],"URL":"https:\/\/doi.org\/10.1142\/s0218126616500699","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,4,22]]}}}