{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,31]],"date-time":"2022-03-31T00:05:56Z","timestamp":1648685156021},"reference-count":20,"publisher":"World Scientific Pub Co Pte Lt","issue":"01","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2017,1]]},"abstract":"<jats:p>In recent years, model order reduction (MOR) of interconnect system has become an important technique to reduce the computation complexity and improve the verification efficiency in the nanometer VLSI design. The Krylov subspaces techniques in existing MOR methods are efficient, and have become the methods of choice for generating small-scale macro-models of the large-scale multi-port RCL networks that arise in VLSI interconnect analysis. Although the Krylov subspace projection-based MOR methods have been widely studied over the past decade in the electrical computer-aided design community, all of them do not provide a best optimal solution in a given order. In this paper, a minimum norm least-squares solution for MOR by Krylov subspace methods is proposed. The method is based on generalized inverse (or pseudo-inverse) theory. This enables a new criterion for MOR-based Krylov subspace projection methods. Two numerical examples are used to test the PRIMA method based on the method proposed in this paper as a standard model.<\/jats:p>","DOI":"10.1142\/s0218126617500062","type":"journal-article","created":{"date-parts":[[2016,8,5]],"date-time":"2016-08-05T08:08:23Z","timestamp":1470384503000},"page":"1750006","source":"Crossref","is-referenced-by-count":1,"title":["The Minimum Norm Least-Squares Solution in Reduction by Krylov Subspace Methods"],"prefix":"10.1142","volume":"26","author":[{"given":"Xinsheng","family":"Wang","sequence":"first","affiliation":[{"name":"School of Astronautics, Harbin Institute of Technology, 92 West Dazhi Street, Harbin, Heilongjiang 150001, P.\u00a0R.\u00a0China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chenxu","family":"Wang","sequence":"additional","affiliation":[{"name":"International Microelectronics Laboratory, West Culture Road, Weihai, Shandong 264209, P.\u00a0R.\u00a0China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mingyan","family":"Yu","sequence":"additional","affiliation":[{"name":"School of Astronautics, Harbin Institute of Technology, 92 West Dazhi Street, Harbin, Heilongjiang 150001, P.\u00a0R.\u00a0China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2016,10,4]]},"reference":[{"key":"S0218126617500062BIB001","doi-asserted-by":"publisher","DOI":"10.1109\/43.45867"},{"key":"S0218126617500062BIB002","doi-asserted-by":"publisher","DOI":"10.1109\/43.384428"},{"key":"S0218126617500062BIB003","doi-asserted-by":"publisher","DOI":"10.1109\/43.712097"},{"key":"S0218126617500062BIB004","doi-asserted-by":"publisher","DOI":"10.1109\/TAC.1981.1102568"},{"key":"S0218126617500062BIB009","doi-asserted-by":"publisher","DOI":"10.1016\/S0167-9260(96)00008-9"},{"key":"S0218126617500062BIB010","volume-title":"Interconnect Analysis and Synthesis","author":"Lillis J.","year":"1999"},{"key":"S0218126617500062BIB011","volume-title":"Graph Theory with Application to Engineering and Computer Science","author":"Deo N.","year":"1974"},{"key":"S0218126617500062BIB012","volume-title":"Electronic Circuit and System Simulation Methods","author":"Pillage L. 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