{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,31]],"date-time":"2022-03-31T22:15:11Z","timestamp":1648764911574},"reference-count":25,"publisher":"World Scientific Pub Co Pte Lt","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2017,4]]},"abstract":"<jats:p> This paper presents a new tail current-shaping technique to improve the phase noise of an LC quadrature VCO (LC-QVCO) based on Gaussian pulse generator (GPG). The GPG makes a narrow pulse from oscillator sinusoidal output and injects it back to gates of tail transistors to reduce the root-mean-square (RMS) value of impulse sensitivity function (ISF) and to improve phase noise. It will be shown that by utilizing a GPG, total phase noise improvement will be as high as 6[Formula: see text]dB. The proposed circuit was designed and simulated by ADS simulator using 0.18[Formula: see text][Formula: see text]m TSMC RF CMOS design kit. The phase noise's at 3[Formula: see text]MHz frequency offset and carrier frequencies of 2.43[Formula: see text]GHz and 2.6[Formula: see text]GHz are \u2013141[Formula: see text]dBc\/Hz and \u2013135[Formula: see text]dBc\/Hz, respectively, while the total power consumption is 14[Formula: see text]mW under 1.8[Formula: see text]V supply voltage. Tuning range is from 2.43[Formula: see text]GHz to 2.6[Formula: see text]GHz. The figure of merit (FOM) values for the proposed LC-QVCO at 3[Formula: see text]MHz frequency offset are \u2013187.6[Formula: see text]dBc\/Hz and \u2013182.3[Formula: see text]dBc\/Hz for 2.43[Formula: see text]GHz and 2.6[Formula: see text]GHz carrier frequencies, respectively. <\/jats:p>","DOI":"10.1142\/s0218126617500670","type":"journal-article","created":{"date-parts":[[2016,11,9]],"date-time":"2016-11-09T09:34:32Z","timestamp":1478684072000},"page":"1750067","source":"Crossref","is-referenced-by-count":0,"title":["A Low Phase Noise LC Quadrature VCO Using Impulse Shaping Based on Gaussian Pulse Generator"],"prefix":"10.1142","volume":"26","author":[{"given":"Naser","family":"Khatti","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, Science and Research Branch, Islamic Azad University, 1477893855 Tehran, Iran"}]},{"given":"Massoud","family":"Dousti","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Science and Research Branch, Islamic Azad University, 1477893855 Tehran, Iran"}]}],"member":"219","published-online":{"date-parts":[[2016,12,6]]},"reference":[{"key":"S0218126617500670BIB001","doi-asserted-by":"publisher","DOI":"10.1109\/4.972152"},{"key":"S0218126617500670BIB002","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2006.07.022"},{"key":"S0218126617500670BIB003","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2013.02.003"},{"key":"S0218126617500670BIB004","doi-asserted-by":"publisher","DOI":"10.1080\/00207210500443102"},{"key":"S0218126617500670BIB005","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126614500728"},{"key":"S0218126617500670BIB006","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126615501042"},{"key":"S0218126617500670BIB007","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126614501370"},{"key":"S0218126617500670BIB008","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126610006475"},{"key":"S0218126617500670BIB010","doi-asserted-by":"publisher","DOI":"10.1080\/00207217.2012.743073"},{"key":"S0218126617500670BIB011","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.804352"},{"key":"S0218126617500670BIB013","doi-asserted-by":"publisher","DOI":"10.1080\/00207217.2011.593142"},{"key":"S0218126617500670BIB014","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-011-9731-5"},{"key":"S0218126617500670BIB015","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2011.05.012"},{"key":"S0218126617500670BIB016","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.903047"},{"key":"S0218126617500670BIB017","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2008.05.007"},{"key":"S0218126617500670BIB018","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2013.09.010"},{"key":"S0218126617500670BIB019","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2013.02.019"},{"key":"S0218126617500670BIB020","doi-asserted-by":"publisher","DOI":"10.1109\/LMWC.2010.2049438"},{"key":"S0218126617500670BIB022","doi-asserted-by":"publisher","DOI":"10.1080\/00207210601061258"},{"key":"S0218126617500670BIB024","doi-asserted-by":"publisher","DOI":"10.1109\/4.658619"},{"key":"S0218126617500670BIB025","volume-title":"CMOS Logic Circuit Design","author":"Uyemura J. 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