{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:51:40Z","timestamp":1759146700188,"version":"3.37.3"},"reference-count":15,"publisher":"World Scientific Pub Co Pte Ltd","issue":"03","funder":[{"DOI":"10.13039\/501100001809","name":"the National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["61571185"],"award-info":[{"award-number":["61571185"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100001809","name":"the National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["61674054"],"award-info":[{"award-number":["61674054"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100004761","name":"the Natural Science Foundation of Hunan Province","doi-asserted-by":"crossref","award":["2016JJ2030"],"award-info":[{"award-number":["2016JJ2030"]}],"id":[{"id":"10.13039\/501100004761","id-type":"DOI","asserted-by":"crossref"}]},{"name":"the Open Fund Project of Key Laboratory of Hunan Universities","award":["15K027"],"award-info":[{"award-number":["15K027"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2018,3]]},"abstract":"<jats:p> This paper presents a high linearity and low power Low-Noise Amplifier (LNA) for Ultra-Wideband (UWB) receivers based on CHRT 0.18[Formula: see text][Formula: see text]m Complementary Metal-Oxide-Semiconductor (CMOS) technology. In this work, the folded topology is adopted in order to reduce the supply voltage and power consumption. Moreover, a band-pass LC filter is embedded in the folded-cascode circuit to extend bandwidth. The transconductance nonlinearity has a great impact on the whole LNA linearity performance under a low supply voltage. A post-distortion (PD) technique employing an auxiliary transistor is applied in the transconductance stage to improve the linearity. The post-layout simulation results indicate that the proposed LNA achieves a maximum power gain of 12.8[Formula: see text]dB. The input and output reflection coefficients both are lower than [Formula: see text][Formula: see text]dB over 2.5\u201311.5[Formula: see text]GHz. The input third-order intercept point (IIP3) is 5.6[Formula: see text]dBm at 8[Formula: see text]GHz and the noise figure (NF) is lower than 4.0[Formula: see text]dB. The LNA consumes 5.4[Formula: see text]mW power under a 1[Formula: see text]V supply voltage. <\/jats:p>","DOI":"10.1142\/s0218126618500470","type":"journal-article","created":{"date-parts":[[2017,7,12]],"date-time":"2017-07-12T23:16:30Z","timestamp":1499901390000},"page":"1850047","source":"Crossref","is-referenced-by-count":4,"title":["A Novel High Linearity and Low Power Folded CMOS LNA for UWB Receivers"],"prefix":"10.1142","volume":"27","author":[{"given":"Xin","family":"Zhang","sequence":"first","affiliation":[{"name":"College of Computer Science and Electronic Engineering, Hunan University, Changsha 410082, P. R. China"}]},{"given":"Chunhua","family":"Wang","sequence":"additional","affiliation":[{"name":"College of Computer Science and Electronic Engineering, Hunan University, Changsha 410082, P. R. China"}]},{"given":"Yichuang","family":"Sun","sequence":"additional","affiliation":[{"name":"School of Engineering and Technology, University of Hertfordshire, Hatfield, Herts AL 10 9 AB, UK"}]},{"given":"Haijun","family":"Peng","sequence":"additional","affiliation":[{"name":"College of Computer Science and Electronic Engineering, Hunan University, Changsha 410082, P. R. China"}]}],"member":"219","published-online":{"date-parts":[[2017,10,30]]},"reference":[{"key":"S0218126618500470BIB002","doi-asserted-by":"publisher","DOI":"10.1049\/el.2014.0534"},{"journal-title":"Int. J. Circuit Theory Appl.","year":"2016","author":"Saadi R. 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Lee ,  The Design of CMOS Radio-Frequency Integrated Circuits  (Cambridge University Press,  1998), p.  164."},{"key":"S0218126618500470BIB019","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.894329"},{"key":"S0218126618500470BIB020","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.883336"},{"key":"S0218126618500470BIB021","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.884113"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126618500470","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T11:16:54Z","timestamp":1565090214000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126618500470"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,10,30]]},"references-count":15,"journal-issue":{"issue":"03","published-online":{"date-parts":[[2017,10,30]]},"published-print":{"date-parts":[[2018,3]]}},"alternative-id":["10.1142\/S0218126618500470"],"URL":"https:\/\/doi.org\/10.1142\/s0218126618500470","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"type":"print","value":"0218-1266"},{"type":"electronic","value":"1793-6454"}],"subject":[],"published":{"date-parts":[[2017,10,30]]}}}