{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,28]],"date-time":"2024-07-28T11:59:03Z","timestamp":1722167943662},"reference-count":28,"publisher":"World Scientific Pub Co Pte Lt","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2018,4]]},"abstract":"<jats:p> Nowadays, multilevel inverters (MLI) are receiving remarkable attention due to salient features like less voltage stress on switches and low total harmonic distortion (THD) in output voltage. However, the required switch count increases with number of voltage levels. This paper presents a new topology for asymmetric multilevel inverter as a fundamental block. Each block generates 13-level output voltage using eight switches and four unequal dc voltage sources. The proposed configuration offers special features such as reduced number of switches, isolated dc sources, cost economy, less complex and modular structure than other similar contemporary topologies. Moreover, significant reduction in voltage stress on the circuit switches can be achieved. Comparative studies of proposed topology with the conventional and recent topologies have been presented in terms of power switches, gate driver circuit requirement, isolated dc voltage sources and total standing voltage. Multicarrier-based sinusoidal pulse width modulation (SPWM) scheme is adopted for generating switching signals using dSPACE real-time controller. In addition, proposed topology offers a fewer number of ON-state switches that lead to reduction in power loss. The proposed topology is validated through simulation and experimental implementation. <\/jats:p>","DOI":"10.1142\/s021812661850055x","type":"journal-article","created":{"date-parts":[[2017,7,31]],"date-time":"2017-07-31T03:48:10Z","timestamp":1501472890000},"page":"1850055","source":"Crossref","is-referenced-by-count":15,"title":["New Topology for Asymmetrical Multilevel Inverter: An Effort to Reduced Device Count"],"prefix":"10.1142","volume":"27","author":[{"given":"Kishor","family":"Thakre","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela, Odisha 769008, India"}]},{"given":"Kanungo Barada","family":"Mohanty","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela, Odisha 769008, India"}]},{"given":"Vinaya Sagar","family":"Kommukuri","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela, Odisha 769008, India"}]},{"given":"Aditi","family":"Chatterjee","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela, Odisha 769008, India"}]}],"member":"219","published-online":{"date-parts":[[2017,12,6]]},"reference":[{"key":"S021812661850055XBIB001","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2002.801052"},{"key":"S021812661850055XBIB002","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2007.907044"},{"key":"S021812661850055XBIB003","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2009.2030767"},{"key":"S021812661850055XBIB004","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2008.2001892"},{"key":"S021812661850055XBIB005","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2007.915175"},{"key":"S021812661850055XBIB006","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2012.2186108"},{"key":"S021812661850055XBIB007","doi-asserted-by":"publisher","DOI":"10.1016\/j.enconman.2009.06.032"},{"key":"S021812661850055XBIB008","doi-asserted-by":"publisher","DOI":"10.5370\/JEET.2011.6.2.245"},{"key":"S021812661850055XBIB009","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2013.0057"},{"key":"S021812661850055XBIB010","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2012.0438"},{"key":"S021812661850055XBIB011","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2013.0261"},{"key":"S021812661850055XBIB012","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2012.0563"},{"key":"S021812661850055XBIB013","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2010.2050412"},{"key":"S021812661850055XBIB014","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2011.2176691"},{"key":"S021812661850055XBIB015","doi-asserted-by":"publisher","DOI":"10.1109\/TIA.2005.844382"},{"key":"S021812661850055XBIB016","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2006.880303"},{"key":"S021812661850055XBIB017","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2009.2030204"},{"key":"S021812661850055XBIB018","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2013.2282606"},{"key":"S021812661850055XBIB019","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2013.2290751"},{"key":"S021812661850055XBIB020","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126616500201"},{"key":"S021812661850055XBIB021","doi-asserted-by":"publisher","DOI":"10.1142\/S021812661650081X"},{"key":"S021812661850055XBIB022","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126616501577"},{"key":"S021812661850055XBIB023","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2015.0682"},{"key":"S021812661850055XBIB024","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2007.896274"},{"key":"S021812661850055XBIB025","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2013.0423"},{"key":"S021812661850055XBIB027","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2016.0154"},{"key":"S021812661850055XBIB028","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2011.0293"},{"key":"S021812661850055XBIB029","doi-asserted-by":"publisher","DOI":"10.1080\/15325008.2015.1021058"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S021812661850055X","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T18:38:14Z","timestamp":1565116694000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S021812661850055X"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,12,6]]},"references-count":28,"journal-issue":{"issue":"04","published-online":{"date-parts":[[2017,12,6]]},"published-print":{"date-parts":[[2018,4]]}},"alternative-id":["10.1142\/S021812661850055X"],"URL":"https:\/\/doi.org\/10.1142\/s021812661850055x","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,12,6]]}}}