{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T05:37:57Z","timestamp":1740116277454,"version":"3.37.3"},"reference-count":23,"publisher":"World Scientific Pub Co Pte Ltd","issue":"06","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2018,6,15]]},"abstract":"<jats:p> Evolutionary computation uses Darwinian principles to find solutions from a given search space and forms the basis for evolving digital circuits. One of the most computationally expensive steps in evolutionary computation is the comparison of the candidate circuit or chromosome with the target truth table. We propose to use a satisfiability solver, to improve upon the efficiency of this process, which is traditionally done using exhaustive simulation. The paper presents an implementation of the satisfiability solver, which is in turn used to develop a digital circuit evolution methodology based on the principles of cartesian genetic programming. The proposed methodology performs better, in terms of speed of design space exploration, for circuits whose behavior can be expressed compactly in terms of conjunctive normal form clauses. For illustration purposes, the proposed methodology has been used to evolve various commonly used digital circuits and a few benchmarks. <\/jats:p>","DOI":"10.1142\/s0218126618500998","type":"journal-article","created":{"date-parts":[[2017,10,17]],"date-time":"2017-10-17T05:25:40Z","timestamp":1508217940000},"page":"1850099","source":"Crossref","is-referenced-by-count":1,"title":["SAT Based Fitness Scoring for Digital Circuit Evolution"],"prefix":"10.1142","volume":"27","author":[{"given":"Mumtaz","family":"Ali","sequence":"first","affiliation":[{"name":"School of Electrical Engineering and Computer Science, National University of Sciences and Technology (NUST), Sector H-12, Islamabad, Pakistan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2562-2669","authenticated-orcid":false,"given":"Osman","family":"Hasan","sequence":"additional","affiliation":[{"name":"School of Electrical Engineering and Computer Science, National University of Sciences and Technology (NUST), Sector H-12, Islamabad, Pakistan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2018,2,22]]},"reference":[{"key":"S0218126618500998BIB001","volume-title":"Introduction to Evolvable Hardware","author":"Greenwood G.","year":"2007","edition":"1"},{"key":"S0218126618500998BIB002","volume-title":"Genetic Programming IV: Routine Human-Competitive Machine Intelligence","author":"Koza J. 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