{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,27]],"date-time":"2026-05-27T18:38:14Z","timestamp":1779907094088,"version":"3.53.1"},"reference-count":8,"publisher":"World Scientific Pub Co Pte Ltd","issue":"07","funder":[{"DOI":"10.13039\/501100001809","name":"the National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["61604111"],"award-info":[{"award-number":["61604111"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100002858","name":"the China Postdoctoral Science Foundation","doi-asserted-by":"crossref","award":["2016M602772"],"award-info":[{"award-number":["2016M602772"]}],"id":[{"id":"10.13039\/501100002858","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100001809","name":"the National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["61625403"],"award-info":[{"award-number":["61625403"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2018,6,30]]},"abstract":"<jats:p> A low-power, low-supply, low-complexity all-MOSFET voltage reference is implemented in 0.18[Formula: see text][Formula: see text]m CMOS process. With the proposed architecture, the number of the transistors can be reduced to the greatest extent. As a result, the supply voltage can not only be decreased to as low as 0.7[Formula: see text]V, but the power consumption can also be optimized significantly. Simulation results show that the power consumption is 47[Formula: see text]nW, at a supply of 0.7[Formula: see text]V.\u00a0A temperature coefficient (TC) of 42[Formula: see text]ppm\/[Formula: see text]C is achieved when the temperature ranges from [Formula: see text]20[Formula: see text]C to 80[Formula: see text]C.\u00a0At room temperature, the voltage reference features a line regulation (LR) of 2.66%\/V. <\/jats:p>","DOI":"10.1142\/s0218126618501050","type":"journal-article","created":{"date-parts":[[2017,10,26]],"date-time":"2017-10-26T00:08:19Z","timestamp":1508976499000},"page":"1850105","source":"Crossref","is-referenced-by-count":10,"title":["A 42ppm\/\u2218C 0.7V 47nW Low-Complexity All-MOSFET Sub-Threshold Voltage Reference"],"prefix":"10.1142","volume":"27","author":[{"given":"Yuhua","family":"Liang","sequence":"first","affiliation":[{"name":"School of Microelectronics, Xidian University, 2 South Taibai Road, Xi\u2019an Shaanxi, Xi\u2019an 710071, P. R. China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7764-1928","authenticated-orcid":false,"given":"Zhangming","family":"Zhu","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, 2 South Taibai Road, Xi\u2019an Shaanxi, Xi\u2019an 710071, P. R. China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"219","published-online":{"date-parts":[[2018,3,26]]},"reference":[{"key":"S0218126618501050BIB001","doi-asserted-by":"publisher","DOI":"10.1049\/el.2015.2637"},{"key":"S0218126618501050BIB002","doi-asserted-by":"publisher","DOI":"10.1049\/el.2014.4521"},{"key":"S0218126618501050BIB003","doi-asserted-by":"publisher","DOI":"10.1049\/el.2016.1267"},{"key":"S0218126618501050BIB004","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2458044"},{"key":"S0218126618501050BIB008","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2021922"},{"key":"S0218126618501050BIB009","unstructured":"T. C. Carusone,  D. A. Johns and  K. W. Martin,  Analog Integrated Circuit Design (Wiley,  New York,  2012), pp. 21."},{"key":"S0218126618501050BIB010","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2530096"},{"key":"S0218126618501050BIB011","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2345298"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126618501050","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T09:30:40Z","timestamp":1565083840000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126618501050"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3,26]]},"references-count":8,"journal-issue":{"issue":"07","published-online":{"date-parts":[[2018,3,26]]},"published-print":{"date-parts":[[2018,6,30]]}},"alternative-id":["10.1142\/S0218126618501050"],"URL":"https:\/\/doi.org\/10.1142\/s0218126618501050","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,3,26]]}}}