{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,1]],"date-time":"2024-07-01T21:53:47Z","timestamp":1719870827331},"reference-count":21,"publisher":"World Scientific Pub Co Pte Ltd","issue":"08","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2018,7]]},"abstract":"<jats:p>In this paper, a high performance single-phase modified bridgeless AC\u2013DC converter with reduced switch voltage stress for power factor correction (PFC) is introduced. The proposed converter is based on a single-ended primary-inductance converter (SEPIC) to meet the demands of PFC to unity and output voltage regulation. To reduce the number of components, the input bridge is combined with the SEPIC converter since the conventional SEPIC PFC is suffering with high conduction losses. It offers many advantages, such as fewer semiconductor devices in current flowing path which lead to improve the thermal management, low stress on each component, improved efficiency, high power factor compared to classical converter. Detailed analysis and design equations of the converter are presented. Simulation and experimental results are discussed for a 300[Formula: see text]W prototypeunder the universal input voltage (85\u2013235[Formula: see text]V) to validate the performance of the converter.<\/jats:p>","DOI":"10.1142\/s021812661850127x","type":"journal-article","created":{"date-parts":[[2017,11,27]],"date-time":"2017-11-27T02:39:29Z","timestamp":1511750369000},"page":"1850127","source":"Crossref","is-referenced-by-count":4,"title":["Modified Bridgeless SEPIC Rectifier for Power Factor Correction with Reduced Switch Stress Operating in Continuous Conduction Mode"],"prefix":"10.1142","volume":"27","author":[{"given":"Vinaya Sagar","family":"Kommukuri","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela, Odisha 769008, India"}]},{"given":"Kanungo Barada","family":"Mohanty","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela, Odisha 769008, India"}]},{"given":"Aditi","family":"Chatterjee","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela, Odisha 769008, India"}]},{"given":"Kishor","family":"Thakre","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela, Odisha 769008, India"}]}],"member":"219","published-online":{"date-parts":[[2018,4,12]]},"reference":[{"key":"S021812661850127XBIB001","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2005.843913"},{"key":"S021812661850127XBIB005","doi-asserted-by":"crossref","first-page":"602","DOI":"10.1109\/TPEL.2010.2068060","volume":"26","author":"Jang Y.","year":"2011","journal-title":"IEEE Trans. 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