{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,27]],"date-time":"2026-09-27T12:32:23Z","timestamp":1790512343678,"version":"4.1.0"},"reference-count":13,"publisher":"World Scientific Pub Co Pte Ltd","issue":"08","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2018,7]]},"abstract":"<jats:p> This paper introduces a new technique to design an analog MOS switch to be used in sampled-data circuits. In any sampled-data system, the accuracy of the sampling switch is a critical parameter to determine the overall performance of the system. To satisfy accuracy requirements of the switch, a novel technique to reduce channel charge injection error is proposed. The proposed switch has a very simple structure and it uses a small area of the chip. Also, it has a low on-resistance and its variation over the input signal range is acceptable. In order to evaluate the performance of the proposed switch, simulations are done in a 0.18[Formula: see text][Formula: see text]m standard CMOS technology. Simulation results show that the sampling errors produced by the channel charge injection is eliminated through a cancellation technique using an auxiliary transistor. The output error charge due to charge injection over a wide range of the input signal variation is very low (less than 1.45[Formula: see text]fC). Also, simulation results show that the proposed switch achieves signal-to-noise plus distortion ratio (SNDR) of 85.05[Formula: see text]dB, effective number of bits (ENOB) of 13.83, total harmonic distortion (THD) of [Formula: see text]87.23[Formula: see text]dB and spurious-free dynamic range (SFDR) of 88.14[Formula: see text]dB for a 1[Formula: see text]MHz sinusoidal input of 800[Formula: see text]mV peak-to-peak amplitude at 50[Formula: see text]MHz sampling rate with a 1.8[Formula: see text]V supply voltage. <\/jats:p>","DOI":"10.1142\/s021812661850130x","type":"journal-article","created":{"date-parts":[[2017,11,27]],"date-time":"2017-11-27T02:39:29Z","timestamp":1511750369000},"page":"1850130","source":"Crossref","is-referenced-by-count":10,"title":["A Simple and Efficient Charge Injection Error Compensation Structure for MOS Sampling Switches"],"prefix":"10.1142","volume":"27","author":[{"given":"Saeed","family":"Naghavi","sequence":"first","affiliation":[{"name":"School of Electrical Engineering, Iran University of Science and Technology, Tehran, Iran"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mojde","family":"Nematzade","sequence":"additional","affiliation":[{"name":"Faculty of Electrical and Computer Engineering, Tabriz University, Tabriz, Iran"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Niloofar","family":"Sharifi","sequence":"additional","affiliation":[{"name":"School of Electrical Engineering, Iran University of Science and Technology, Tehran, Iran"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tohid Moradi","family":"Khanshan","sequence":"additional","affiliation":[{"name":"Microelectronics Research Laboratory, Urmia University, Urmia, Iran"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Adib","family":"Abrishamifar","sequence":"additional","affiliation":[{"name":"School of Electrical Engineering, Iran University of Science and Technology, Tehran, Iran"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ziaaddin Daie","family":"Kuzekanani","sequence":"additional","affiliation":[{"name":"Faculty of Electrical and Computer Engineering, Tabriz University, Tabriz, Iran"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jafar","family":"Sobhi","sequence":"additional","affiliation":[{"name":"Faculty of Electrical and Computer Engineering, Tabriz University, Tabriz, Iran"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"219","published-online":{"date-parts":[[2018,4,12]]},"reference":[{"key":"S021812661850130XBIB002","volume-title":"Data Conversion Handbook","author":"Kester W.","year":"2005"},{"key":"S021812661850130XBIB003","doi-asserted-by":"publisher","DOI":"10.1109\/4.34103"},{"key":"S021812661850130XBIB004","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2009.2020945"},{"key":"S021812661850130XBIB008","doi-asserted-by":"publisher","DOI":"10.1109\/81.915383"},{"key":"S021812661850130XBIB011","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cds.2008.0354"},{"key":"S021812661850130XBIB012","doi-asserted-by":"publisher","DOI":"10.1587\/elex.8.189"},{"key":"S021812661850130XBIB014","doi-asserted-by":"publisher","DOI":"10.1093\/ietfec\/e89-a.2.456"},{"key":"S021812661850130XBIB015","volume-title":"Design of Analog CMOS Integrated Circuits","author":"Razavi B.","year":"2016"},{"key":"S021812661850130XBIB016","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1987.1052859"},{"key":"S021812661850130XBIB017","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1984.1052176"},{"key":"S021812661850130XBIB018","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1987.1052713"},{"key":"S021812661850130XBIB021","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.837247"},{"key":"S021812661850130XBIB024","doi-asserted-by":"publisher","DOI":"10.1007\/s12209-013-1957-0"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S021812661850130X","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T02:17:52Z","timestamp":1565144272000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S021812661850130X"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,4,12]]},"references-count":13,"journal-issue":{"issue":"08","published-online":{"date-parts":[[2018,4,12]]},"published-print":{"date-parts":[[2018,7]]}},"alternative-id":["10.1142\/S021812661850130X"],"URL":"https:\/\/doi.org\/10.1142\/s021812661850130x","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,4,12]]}}}