{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T05:37:57Z","timestamp":1740116277932,"version":"3.37.3"},"reference-count":8,"publisher":"World Scientific Pub Co Pte Ltd","issue":"11","funder":[{"DOI":"10.13039\/501100001809","name":"The National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["61376025"],"award-info":[{"award-number":["61376025"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]},{"name":"The Natural Science Foundation of Jiangsu Province","award":["BK20160806"],"award-info":[{"award-number":["BK20160806"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2018,10]]},"abstract":"<jats:p> As the only nonlinear operation, masked S-box is the core to resist differential power attack (DPA) for advanced encryption standard (AES) cipher chips. In order to suit for the resource-constrained applications, a compact masked S-box based on composite field is proposed in this paper. Firstly, the architecture of masked S-box is designed with composite field masking method. Secondly, four masked S-boxes based on GF ((2[Formula: see text], which are based on four basis methods with the optimal coefficient and the corresponding optimal root, are implemented and optimized by the delay-aware common subexpression elimination (DACSE) algorithm. Finally, experimental results show that, while maintaining the DPA-resistance performance, our best masked S-box achieves better area performance with the fastest speed compared with the existing works. Therefore, our masked S-box is suitable for resource-constrained applications with fast speed requirements. <\/jats:p>","DOI":"10.1142\/s0218126618501712","type":"journal-article","created":{"date-parts":[[2018,1,19]],"date-time":"2018-01-19T04:32:07Z","timestamp":1516336327000},"page":"1850171","source":"Crossref","is-referenced-by-count":11,"title":["An Optimized Design for Compact Masked AES S-Box Based on Composite Field and Common Subexpression Elimination Algorithm"],"prefix":"10.1142","volume":"27","author":[{"given":"Yunfei","family":"Ye","sequence":"first","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, No. 29 General Avenue, Nanjing 211106, Jiangsu Province, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ning","family":"Wu","sequence":"additional","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, No. 29 General Avenue, Nanjing 211106, Jiangsu Province, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiaoqiang","family":"Zhang","sequence":"additional","affiliation":[{"name":"College of Electrical Engineering, Anhui Polytechnic University, Beijing Middle Road, Wuhu 241000, Anhui Province, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Liling","family":"Dong","sequence":"additional","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, No. 29 General Avenue, Nanjing 211106, Jiangsu Province, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fang","family":"Zhou","sequence":"additional","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, No. 29 General Avenue, Nanjing 211106, Jiangsu Province, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2018,6,6]]},"reference":[{"key":"S0218126618501712BIB001","doi-asserted-by":"publisher","DOI":"10.1002\/sec.723"},{"key":"S0218126618501712BIB007","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-30496-8_18"},{"key":"S0218126618501712BIB009","doi-asserted-by":"publisher","DOI":"10.1016\/S1004-4132(08)60134-6"},{"key":"S0218126618501712BIB010","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cds.2010.0435"},{"key":"S0218126618501712BIB011","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2141693"},{"key":"S0218126618501712BIB012","doi-asserted-by":"publisher","DOI":"10.1587\/elex.11.20140934"},{"key":"S0218126618501712BIB014","doi-asserted-by":"publisher","DOI":"10.4156\/jcit.vol7.issue10.40"},{"key":"S0218126618501712BIB015","doi-asserted-by":"publisher","DOI":"10.1049\/iet-ifs:20080041"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126618501712","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T12:57:12Z","timestamp":1565182632000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126618501712"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,6,6]]},"references-count":8,"journal-issue":{"issue":"11","published-online":{"date-parts":[[2018,6,6]]},"published-print":{"date-parts":[[2018,10]]}},"alternative-id":["10.1142\/S0218126618501712"],"URL":"https:\/\/doi.org\/10.1142\/s0218126618501712","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"type":"print","value":"0218-1266"},{"type":"electronic","value":"1793-6454"}],"subject":[],"published":{"date-parts":[[2018,6,6]]}}}