{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,30]],"date-time":"2025-10-30T22:37:27Z","timestamp":1761863847865,"version":"3.37.3"},"reference-count":29,"publisher":"World Scientific Pub Co Pte Ltd","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2019,4]]},"abstract":"<jats:p>In this paper, a new asymmetric switched diode (ASD) multilevel inverter\u00a0is presented for medium-voltage and high-power applications. The proposed converter consists of series connection basic unit with full-bridge inverter. In addition to this, a cascaded switched diode (CSD) structure is recommended to generate the higher number of voltage levels. Seven different algorithms are presented to determine the magnitudes of DC sources in CSD topology. To prove the advantages of proposed multilevel converter over recent multilevel converters in terms of blocking voltage, numbers of IGBTs and on-state switches are presented. To show the authority of the proposed multilevel inverter, it is simulated using MATLAB\/Simulink and is experimentally tested using prototype model for 13-level inverter. Finally, various output voltage and current waveforms are shown to prove the dynamic behavior of proposed inverter.<\/jats:p>","DOI":"10.1142\/s0218126619500646","type":"journal-article","created":{"date-parts":[[2018,6,6]],"date-time":"2018-06-06T03:06:41Z","timestamp":1528254401000},"page":"1950064","source":"Crossref","is-referenced-by-count":8,"title":["A New Asymmetric and Cascaded Switched Diode Multilevel Inverter Topology for Reduced Switches, DC Source and Blocked Voltage on Switches"],"prefix":"10.1142","volume":"28","author":[{"given":"S. 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