{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,23]],"date-time":"2026-04-23T12:38:55Z","timestamp":1776947935763,"version":"3.51.4"},"reference-count":46,"publisher":"World Scientific Pub Co Pte Ltd","issue":"14","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2019,12,31]]},"abstract":"<jats:p>Automatic test pattern generation (ATPG) is one of the important issues in testing digital circuits. Due to considerable advances made in the past two decades, the ATPG algorithms that are based on Boolean satisfiability have become an integral part of the digital circuits. In this paper, a new method for ATPG for testing bridging faults is introduced. First of all, the application of Boolean satisfiability to circuit modeling is explained. Afterwards, a new method of testing the nonfeedback bridging faults in the combinational circuits is proposed based on Boolean satisfiability. In the proposed method, the faulty circuit is obtained by injecting the faulty gate into the main circuit. Afterwards, the final differential circuit is prepared by using the fault-free and the faulty circuits. Finally, using the resulting differential circuit, the testability of the fault is assessed and the input pattern for detecting the fault in the main circuit is derived. The experimental results presented at the end of this paper indicate the effectiveness and usefulness of this method for testing the bridging faults.<\/jats:p>","DOI":"10.1142\/s0218126619502402","type":"journal-article","created":{"date-parts":[[2019,1,23]],"date-time":"2019-01-23T06:37:27Z","timestamp":1548225447000},"page":"1950240","source":"Crossref","is-referenced-by-count":3,"title":["Automatic Test Pattern Generation Through Boolean Satisfiability for Testing Bridging Faults"],"prefix":"10.1142","volume":"28","author":[{"given":"Hossein","family":"Mokhtarnia","sequence":"first","affiliation":[{"name":"Department of Computer Architecture, Faculty of Computer Engineering, University of Isfahan, Azadi square, Isfahan 8174673441, Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shahram Etemadi","family":"Borujeni","sequence":"additional","affiliation":[{"name":"Department of Computer Architecture, Faculty of Computer Engineering, University of Isfahan, Azadi square, Isfahan 8174673441, Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mohammad Saeed","family":"Ehsani","sequence":"additional","affiliation":[{"name":"Department of Artificial Intelligence, Faculty of Computer Engineering, University of Isfahan, Azadi square, Isfahan 8174673441, Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2019,2,20]]},"reference":[{"key":"S0218126619502402BIB001","volume-title":"Digital Systems Testing and Testable Design","volume":"2","author":"Abramovici M.","year":"1990"},{"key":"S0218126619502402BIB002","volume-title":"Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits","volume":"17","author":"Bushnell M.","year":"2004"},{"key":"S0218126619502402BIB003","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511816321"},{"key":"S0218126619502402BIB004","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1975.224205"},{"key":"S0218126619502402BIB005","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1981.1675757"},{"key":"S0218126619502402BIB006","first-page":"671","volume-title":"IEEE Int. Symp. Circuits and Systems","author":"Fujiwara H.","year":"1985"},{"key":"S0218126619502402BIB007","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1983.1676174"},{"key":"S0218126619502402BIB008","doi-asserted-by":"publisher","DOI":"10.1145\/320954.320957"},{"key":"S0218126619502402BIB009","doi-asserted-by":"publisher","DOI":"10.1147\/rd.104.0278"},{"key":"S0218126619502402BIB010","doi-asserted-by":"publisher","DOI":"10.1109\/PGEC.1967.264743"},{"key":"S0218126619502402BIB011","doi-asserted-by":"publisher","DOI":"10.1147\/rd.111.0114"},{"key":"S0218126619502402BIB012","first-page":"4077","volume":"11","author":"Xin L.","year":"2013","journal-title":"Indonesian J. Electr. Eng. Comput. Sci."},{"key":"S0218126619502402BIB013","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2015.04.005"},{"key":"S0218126619502402BIB014","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2479628"},{"key":"S0218126619502402BIB015","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050914"},{"key":"S0218126619502402BIB016","doi-asserted-by":"publisher","DOI":"10.1109\/ICCIC.2015.7435662"},{"key":"S0218126619502402BIB017","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2014.56"},{"key":"S0218126619502402BIB018","first-page":"359","volume-title":"10th European Conference on Artificial Intelligence (ECAI)","author":"Kautz H. A.","year":"1992"},{"key":"S0218126619502402BIB019","first-page":"377","volume-title":"17th European Conference on Artificial Intelligence (ECAI)","author":"Giunchiglia E.","year":"2006"},{"key":"S0218126619502402BIB020","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337611"},{"key":"S0218126619502402BIB021","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.43"},{"key":"S0218126619502402BIB022","doi-asserted-by":"publisher","DOI":"10.1023\/A:1011276507260"},{"key":"S0218126619502402BIB023","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-018-5747-4"},{"key":"S0218126619502402BIB024","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2015.2455034"},{"key":"S0218126619502402BIB025","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2016.7428102"},{"key":"S0218126619502402BIB026","doi-asserted-by":"publisher","DOI":"10.1109\/43.536723"},{"key":"S0218126619502402BIB027","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1979.1658490"},{"key":"S0218126619502402BIB028","doi-asserted-by":"crossref","first-page":"22","DOI":"10.1145\/309847.309857","volume-title":"Proc. 36th Annual ACM\/IEEE Design Automation Conf.","author":"Prasad M. R.","year":"1999"},{"key":"S0218126619502402BIB029","first-page":"1","volume-title":"GI\/ITG Workshop Testmethoden und Zuverl\u00e4ssigkeit von Schaltungen und Systemen","author":"Tille D.","year":"2007"},{"key":"S0218126619502402BIB030","first-page":"212","volume-title":"Proc. IEEE Computer Society Annual Symp. VLSI","author":"Shi J.","year":"2005"},{"key":"S0218126619502402BIB031","doi-asserted-by":"publisher","DOI":"10.1109\/43.856977"},{"key":"S0218126619502402BIB032","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2010.5699289"},{"key":"S0218126619502402BIB034","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2044673"},{"key":"S0218126619502402BIB035","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2007.80"},{"key":"S0218126619502402BIB036","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2006.297647"},{"key":"S0218126619502402BIB037","volume-title":"A Designer\u2019s Guide to Built-In Self-test","volume":"19","author":"Stroud C. E.","year":"2006"},{"key":"S0218126619502402BIB038","volume-title":"Principles of Testing Electronic Systems","author":"Mourad S.","year":"2000"},{"key":"S0218126619502402BIB039","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1978.tb02106.x"},{"key":"S0218126619502402BIB040","first-page":"492","volume-title":"Proc. Int. Test Conf.","author":"Ferguson F. J.","year":"1991"},{"key":"S0218126619502402BIB041","doi-asserted-by":"publisher","DOI":"10.1109\/ECCTD.2009.5275065"},{"key":"S0218126619502402BIB042","volume-title":"Handbook of Satisfiability. Frontiers in Artificial Intelligence and Applications","volume":"185","author":"Biere A.","year":"2009"},{"key":"S0218126619502402BIB043","doi-asserted-by":"publisher","DOI":"10.1109\/43.108614"},{"key":"S0218126619502402BIB044","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1968.227417"},{"key":"S0218126619502402BIB046","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-7548-5"},{"key":"S0218126619502402BIB047","first-page":"663","volume-title":"Int. Symp. Circuits and Systems, Special Session on ATPG and Fault Simulation","author":"Brglez F.","year":"1985"},{"key":"S0218126619502402BIB050","first-page":"502","volume-title":"Int. Conf. Theory and Applications of Satisfiability Testing","author":"E\u00e9n N.","year":"2003"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126619502402","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,9,13]],"date-time":"2023-09-13T03:13:40Z","timestamp":1694574820000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126619502402"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,2,20]]},"references-count":46,"journal-issue":{"issue":"14","published-print":{"date-parts":[[2019,12,31]]}},"alternative-id":["10.1142\/S0218126619502402"],"URL":"https:\/\/doi.org\/10.1142\/s0218126619502402","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,2,20]]}}}