{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,24]],"date-time":"2025-03-24T08:16:07Z","timestamp":1742804167290,"version":"3.37.3"},"reference-count":41,"publisher":"World Scientific Pub Co Pte Ltd","issue":"06","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2020,5]]},"abstract":"<jats:p> Multilevel inverters (MLIs) emerged as a boon to the industries due to the fact that it fulfils different industrial aspects such as reduced electromagnetic interference, lower maintenance, less installation area and reduced harmonic content. MLI generates a staircase output voltage with suitable combination of power devices and DC voltage sources. In this work, a generalized cascaded MLI is proposed that employs only a half-bridge converter rather than the full H-bridge converter for the polarity-reversal (on which the maximum DC link voltage appears) and thereby also reduces the required number of power switches. Five different types of algorithm in the proposed configuration have been studied and the most optimal algorithm is further elaborated and implemented. A specimen 7-level inverter of the proposed configuration is modeled in MATLAB\/Simulink and is further implemented in the laboratory using the controller DS1103. The experimental results for different modulation indices are further amalgamated and verified with the simulation results. Nevertheless, a comparative assessment of different performance-related parameters of the proposed topology along with the generalized expressions is carried out and are also compared with some of the recently published MLI topologies. <\/jats:p>","DOI":"10.1142\/s0218126620500930","type":"journal-article","created":{"date-parts":[[2019,7,9]],"date-time":"2019-07-09T07:01:02Z","timestamp":1562655662000},"page":"2050093","source":"Crossref","is-referenced-by-count":11,"title":["Reduction of Power Electronic Devices in a Single-Phase Generalized Multilevel Inverter"],"prefix":"10.1142","volume":"29","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5725-2039","authenticated-orcid":false,"given":"Bidyut","family":"Mahato","sequence":"first","affiliation":[{"name":"Indian Institute of Technology (Indian School of Mines), Dhanbad, Jharkhand 826004, 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