{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,8]],"date-time":"2025-09-08T05:47:05Z","timestamp":1757310425208,"version":"3.37.3"},"reference-count":18,"publisher":"World Scientific Pub Co Pte Ltd","issue":"08","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2020,6,30]]},"abstract":"<jats:p> Nowadays, Hardware Trojan threats have become inevitable due to the growing complexities of Integrated Circuits (ICs) as well as the current trend of Intellectual Property (IP)-based hardware designs. An adversary can insert a Hardware Trojan during any of its life cycle phases\u00a0\u2014 the design, fabrication or even at manufacturing phase. Once a Trojan is inserted into a system, it can cause an unwanted modification to system functionality which may degrade system performance or sometimes Trojans are implanted with the target to leak secret information. Once Trojans are implanted, they are hard to detect and impossible to remove from the system as they are already fabricated into the chip. In this paper, we propose three stealthy Trojan models which affect the coherence mechanism of Chip Multiprocessors\u2019 (CMPs) cache system by arbitrarily modifying the cache block state which in turn may leave the cache line states as incoherent. We have evaluated the payload of such modeled Trojans and proposed a cellular automaton (CA)-based solution for detection of such Trojans. <\/jats:p>","DOI":"10.1142\/s0218126620501200","type":"journal-article","created":{"date-parts":[[2019,9,9]],"date-time":"2019-09-09T08:11:41Z","timestamp":1568016701000},"page":"2050120","source":"Crossref","is-referenced-by-count":3,"title":["CA-Based Detection of Coherence Exploiting Hardware Trojans"],"prefix":"10.1142","volume":"29","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5893-9390","authenticated-orcid":false,"given":"Suvadip","family":"Hazra","sequence":"first","affiliation":[{"name":"Department of Computer Science and Engineering, National Institute of Technology Durgapur, Durgapur 713209, West Bengal, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mamata","family":"Dalui","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, National Institute of Technology Durgapur, Durgapur 713209, West Bengal, India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2019,10,18]]},"reference":[{"key":"S0218126620501200BIB001","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2334493"},{"key":"S0218126620501200BIB002","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126618501384"},{"key":"S0218126620501200BIB003","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7926975"},{"journal-title":"J. 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