{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,20]],"date-time":"2025-11-20T12:45:04Z","timestamp":1763642704690,"version":"3.37.3"},"reference-count":22,"publisher":"World Scientific Pub Co Pte Ltd","issue":"08","funder":[{"DOI":"10.13039\/501100004564","name":"Ministarstvo Prosvete, Nauke i Tehnolokog Razvoja","doi-asserted-by":"publisher","award":["TR32004"],"award-info":[{"award-number":["TR32004"]}],"id":[{"id":"10.13039\/501100004564","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100004564","name":"Ministarstvo Prosvete, Nauke i Tehnolokog Razvoja","doi-asserted-by":"publisher","award":["TR32004"],"award-info":[{"award-number":["TR32004"]}],"id":[{"id":"10.13039\/501100004564","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100004564","name":"Ministarstvo Prosvete, Nauke i Tehnolokog Razvoja","doi-asserted-by":"publisher","award":["TR32004"],"award-info":[{"award-number":["TR32004"]}],"id":[{"id":"10.13039\/501100004564","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2020,6,30]]},"abstract":"<jats:p> This paper presents results regarding the progress achieved in the design of a customized encrypted multiplexer cell. The focus of our interest is the no short-circuit dynamic differential logic method that demonstrates high immunity of a standard logic cell to the side channel attacks (SCAs). Three innovative solutions are examined and the best one is proposed for the encrypted multiplexer cell. Designed cells are realized to the layout masks level targeting the 350[Formula: see text]nm CMOS process. The post-layout simulations showed high resistivity to the SCA for all designed cells. The resistance to the SCA of the proposed design was statistically verified at the transistor level. The verification is performed using the Monte Carlo (MC) simulation in which widths and lengths of the transistor channel were varied according to the Gaussian distribution. The designed encrypted cell will be the part of a more complex crypto system for power consumption metering which should increase overall system\u2019s data security. <\/jats:p>","DOI":"10.1142\/s0218126620501315","type":"journal-article","created":{"date-parts":[[2019,9,10]],"date-time":"2019-09-10T03:57:14Z","timestamp":1568087834000},"page":"2050131","source":"Crossref","is-referenced-by-count":1,"title":["Hardware Reduction and Statistical Verification of Cryptographic Standard Cell Resistant to SCA"],"prefix":"10.1142","volume":"29","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0935-6922","authenticated-orcid":false,"given":"Milena Stanojlovi\u0107","family":"Mirkovi\u0107","sequence":"first","affiliation":[{"name":"Innovation Centre of Advanced Technologies, Bulevar Nikole Tesle 61, Loc. 5, Ni\u0161 18000, Serbia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Miljana","family":"Mili\u0107","sequence":"additional","affiliation":[{"name":"Department of Electronics, Faculty of Electronic Engineering, University of Ni\u0161, Aleksandra Medvedeva 14, Ni\u0161 18000, Serbia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dejan","family":"Mirkovi\u0107","sequence":"additional","affiliation":[{"name":"Department of Electronics, Faculty of Electronic Engineering, University of Ni\u0161, Aleksandra Medvedeva 14, Ni\u0161 18000, Serbia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Van\u010do","family":"Litovski","sequence":"additional","affiliation":[{"name":"Department of Electronics, Faculty of Electronic Engineering, University of Ni\u0161, Aleksandra Medvedeva 14, Ni\u0161 18000, Serbia"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2019,10,29]]},"reference":[{"key":"S0218126620501315BIB001","doi-asserted-by":"publisher","DOI":"10.1007\/s13389-011-0006-y"},{"key":"S0218126620501315BIB002","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-007-1338-3_3"},{"key":"S0218126620501315BIB003","first-page":"179","volume-title":"Proc. SECI, Securite des communications sur Internet","author":"Quisquater J.","year":"2002"},{"key":"S0218126620501315BIB004","doi-asserted-by":"crossref","unstructured":"S. Hong,  Side Channel Attacks, ed.   S. Hong  (Applied Sciences,  2019), pp. 1\u20136,  https:\/\/doi.org\/10.3390\/app9091881.","DOI":"10.3390\/app9091881"},{"key":"S0218126620501315BIB005","doi-asserted-by":"publisher","DOI":"10.1049\/iet-ifs.2012.0319"},{"key":"S0218126620501315BIB006","first-page":"1","volume":"3","author":"Wahid M. D. Nazeh Abdul","year":"2018","journal-title":"J. Comp. Sci. Appl. Inform. Technol."},{"key":"S0218126620501315BIB008","doi-asserted-by":"publisher","DOI":"10.1007\/1-4020-8147-2_10"},{"key":"S0218126620501315BIB010","volume-title":"Digital Integrated Circuits: A Design Perspective","author":"Rabaey J.","year":"2002","edition":"2"},{"key":"S0218126620501315BIB011","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.113"},{"key":"S0218126620501315BIB012","doi-asserted-by":"publisher","DOI":"10.1007\/11894063_19"},{"key":"S0218126620501315BIB013","doi-asserted-by":"publisher","DOI":"10.1049\/cje.2017.03.003"},{"key":"S0218126620501315BIB014","doi-asserted-by":"publisher","DOI":"10.1109\/ITNG.2009.185"},{"key":"S0218126620501315BIB015","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-71637-4"},{"key":"S0218126620501315BIB016","doi-asserted-by":"publisher","DOI":"10.1007\/s10617-008-9017-z"},{"key":"S0218126620501315BIB020","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-35416-8_6"},{"key":"S0218126620501315BIB021","first-page":"13","volume-title":"Proc. Int. Cryptographic Module Conf.","volume":"1001","author":"Becker G.","year":"2013"},{"issue":"4","key":"S0218126620501315BIB022","first-page":"833","volume":"22","author":"Wang P.","year":"2013","journal-title":"Chin. J. Electron."},{"key":"S0218126620501315BIB023","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1976.1050795"},{"key":"S0218126620501315BIB024","first-page":"675","volume-title":"Proc. Int. Conf. Computer-Aided Design","author":"Linfu X.","year":"2010"},{"volume-title":"VLSI Circuit Simulation and Optimization","year":"1996","author":"Litovski V.","key":"S0218126620501315BIB025"},{"key":"S0218126620501315BIB026","doi-asserted-by":"publisher","DOI":"10.1049\/PBCS009E"},{"key":"S0218126620501315BIB027","first-page":"141","volume-title":"Proc. Small System Simulation Symp.","author":"Stanojlovic M.","year":"2012"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126620501315","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,6,18]],"date-time":"2020-06-18T01:28:31Z","timestamp":1592443711000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126620501315"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,10,29]]},"references-count":22,"journal-issue":{"issue":"08","published-print":{"date-parts":[[2020,6,30]]}},"alternative-id":["10.1142\/S0218126620501315"],"URL":"https:\/\/doi.org\/10.1142\/s0218126620501315","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"type":"print","value":"0218-1266"},{"type":"electronic","value":"1793-6454"}],"subject":[],"published":{"date-parts":[[2019,10,29]]}}}