{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,10]],"date-time":"2025-12-10T08:52:34Z","timestamp":1765356754070,"version":"3.40.5"},"reference-count":36,"publisher":"World Scientific Pub Co Pte Ltd","issue":"16","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2020,12,30]]},"abstract":"<jats:p> In the last couple of years, quantum computing has come out as emerging trends of computation not only due to its immense popularity but also for its commitment towards physical realization of quantum circuit in on-chip units. At the same time, the process of physical realization has faced several design constraints and one such problem is nearest neighbor (NN) enforcement which demands all the operating qubits to be placed adjacent in the implementable circuit. Though SWAP gate embedment can transform a design into NN architecture, it still creates overhead in the design. So, designing algorithms to restrict the use of SWAPs bears high importance. <\/jats:p><jats:p> Considering this fact, in this work, we are proposing a heuristic-based improved qubit placement strategy for efficient implementation of NN circuit. Two different design policies are being developed here. In the first scheme, a global reordering technique based on clustering approach is shown. In the second scheme, a local reordering technique based on look-ahead policy is developed. This look-ahead strategy considers the impact over the gates in the circuit and thereby estimates the effect using a cost metric to decide the suitable option for SWAP implementation. Furthermore, the joint use of both the ordering schemes also has been explored here. To ascertain the correctness of our design algorithms, we have tested them over a wide range of benchmarks and the obtained results are compared with some state-of-the-art design approaches. From this comparison, we have witnessed a considerable reduction on SWAP cost in our design scheme against the reported works\u2019 results. <\/jats:p>","DOI":"10.1142\/s0218126620502631","type":"journal-article","created":{"date-parts":[[2020,7,18]],"date-time":"2020-07-18T03:44:17Z","timestamp":1595043857000},"page":"2050263","source":"Crossref","is-referenced-by-count":2,"title":["Linear Nearest Neighbor Realization of Quantum Circuits Using Clustering and Look-ahead Policy"],"prefix":"10.1142","volume":"29","author":[{"given":"Anirban","family":"Bhattacharjee","sequence":"first","affiliation":[{"name":"Department of Information Technology, Indian Institute of Engineering Science and Technology, Shibpur, Howrah 711103, WB, India"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1958-3659","authenticated-orcid":false,"given":"Chandan","family":"Bandyopadhyay","sequence":"additional","affiliation":[{"name":"Institute of Computer Science, University of Bremen, 28358 Bremen, Germany"}]},{"given":"Bappaditya","family":"Mondal","sequence":"additional","affiliation":[{"name":"Department of Information Technology, Indian Institute of Engineering Science and Technology, Shibpur, Howrah 711103, WB, India"}]},{"given":"Hafizur","family":"Rahaman","sequence":"additional","affiliation":[{"name":"Department of Information Technology, Indian Institute of Engineering Science and Technology, Shibpur, Howrah 711103, WB, India"}]}],"member":"219","published-online":{"date-parts":[[2020,7,18]]},"reference":[{"issue":"2","key":"S0218126620502631BIB002","doi-asserted-by":"crossref","first-page":"303","DOI":"10.1137\/S0036144598347011","volume":"41","author":"Shor P. W.","year":"1999","journal-title":"SIAM Rev."},{"issue":"7068","key":"S0218126620502631BIB004","doi-asserted-by":"crossref","first-page":"643","DOI":"10.1038\/nature04279","volume":"438","author":"H\u00e4ffner H.","year":"2005","journal-title":"Nature"},{"issue":"6890","key":"S0218126620502631BIB005","doi-asserted-by":"crossref","first-page":"709","DOI":"10.1038\/nature00784","volume":"417","author":"Kielpinski D.","year":"2002","journal-title":"Nature"},{"issue":"1976","key":"S0218126620502631BIB006","doi-asserted-by":"crossref","first-page":"4620","DOI":"10.1098\/rsta.2011.0352","volume":"370","author":"Criger B.","year":"2012","journal-title":"Philos. Trans. R. Soc. A, Math. Phys. Eng. Sci."},{"issue":"3","key":"S0218126620502631BIB007","doi-asserted-by":"crossref","first-page":"035315","DOI":"10.1103\/PhysRevB.76.035315","volume":"76","author":"Taylor J. M.","year":"2007","journal-title":"Phys. Rev. B"},{"issue":"3","key":"S0218126620502631BIB008","doi-asserted-by":"crossref","first-page":"032329","DOI":"10.1103\/PhysRevA.75.032329","volume":"75","author":"Blais A.","year":"2007","journal-title":"Phys. Rev. A"},{"key":"S0218126620502631BIB009","first-page":"495","volume-title":"19th Asia and South Pacific Design Automation Conf. (ASP-DAC)","author":"Shafaei A.","year":"2014"},{"key":"S0218126620502631BIB010","doi-asserted-by":"crossref","first-page":"16","DOI":"10.1016\/j.eswa.2016.04.038","volume":"61","author":"Alfailakawi M.","year":"2016","journal-title":"Expert Syst. Appl."},{"key":"S0218126620502631BIB011","first-page":"95","volume-title":"Int. Symp. Nanoelectronic and Information Systems","author":"Shrivastwa R. R.","year":"2015"},{"issue":"1","key":"S0218126620502631BIB012","doi-asserted-by":"crossref","first-page":"182","DOI":"10.1109\/TCAD.2017.2693284","volume":"37","author":"Kole A.","year":"2017","journal-title":"IEEE Trans. Computer-Aided Des. Integr. Circuits Syst."},{"key":"S0218126620502631BIB013","doi-asserted-by":"crossref","first-page":"178","DOI":"10.1109\/ASPDAC.2015.7059001","volume-title":"The 20th Asia and South Pacific Design Automation Conf.","author":"Lye A.","year":"2015"},{"issue":"1","key":"S0218126620502631BIB014","first-page":"142","volume":"11","author":"Hirata Y.","year":"2011","journal-title":"Quantum Inf. Comput."},{"issue":"3","key":"S0218126620502631BIB015","doi-asserted-by":"crossref","first-page":"355","DOI":"10.1007\/s11128-010-0201-2","volume":"10","author":"Saeedi M.","year":"2011","journal-title":"Quantum Inf. Process."},{"journal-title":"Facta Universitatis-Series: Electronics and Energetics","year":"2011","author":"Perkowski M.","key":"S0218126620502631BIB016"},{"issue":"12","key":"S0218126620502631BIB018","doi-asserted-by":"crossref","first-page":"1818","DOI":"10.1109\/TCAD.2014.2356463","volume":"33","author":"Wille R.","year":"2014","journal-title":"IEEE Trans. Comput.-Aid. Des. Integr. Circuits Syst."},{"issue":"1","key":"S0218126620502631BIB019","doi-asserted-by":"crossref","first-page":"62","DOI":"10.1109\/JETCAS.2016.2528720","volume":"6","author":"Kole A.","year":"2016","journal-title":"IEEE J. Emerg. Select. Top. Circuits Syst."},{"key":"S0218126620502631BIB020","first-page":"292","volume-title":"21st Asia and South Pacific Design Automation Conf. (ASP-DAC)","author":"Wille R.","year":"2016"},{"key":"S0218126620502631BIB021","doi-asserted-by":"crossref","first-page":"185","DOI":"10.1007\/978-3-319-59936-6_15","volume-title":"Int. Conf. Reversible Computation","author":"Zulehner A.","year":"2017"},{"issue":"5","key":"S0218126620502631BIB022","doi-asserted-by":"crossref","first-page":"3457","DOI":"10.1103\/PhysRevA.52.3457","volume":"52","author":"Barenco A.","year":"1995","journal-title":"Physical Rev. A"},{"key":"S0218126620502631BIB023","first-page":"77","volume-title":"Int. Workshop on Reversible Computation","author":"Sasanian Z.","year":"2011"},{"key":"S0218126620502631BIB024","doi-asserted-by":"crossref","first-page":"288","DOI":"10.1109\/ISMVL.2011.54","volume-title":"41st Int. Symp. Multiple-Valued Logic, 2011","author":"Miller D. M.","year":"2011"},{"key":"S0218126620502631BIB025","doi-asserted-by":"crossref","first-page":"36","DOI":"10.1145\/2228360.2228368","volume-title":"Proc. 49th Annual Design Automation Conf.","author":"Sasanian Z.","year":"2012"},{"issue":"11","key":"S0218126620502631BIB026","first-page":"1225","volume":"3","author":"Rani Y.","year":"2013","journal-title":"Int. J. Inf. Comput. Technol."},{"key":"S0218126620502631BIB027","first-page":"220","volume-title":"38th International Symposium on Multiple Valued Logic (ismvl 2008)","author":"Robert W.","year":"2008"},{"key":"S0218126620502631BIB028","doi-asserted-by":"crossref","first-page":"248","DOI":"10.1007\/978-3-319-59936-6_19","volume-title":"Int. Conf. Reversible Computation","author":"Marbaniang L.","year":"2017"},{"key":"S0218126620502631BIB029","first-page":"305","volume-title":"IEEE Computer Society Annual Symp. VLSI (ISVLSI)","author":"Bhattacharjee A.","year":"2018"},{"issue":"5","key":"S0218126620502631BIB030","doi-asserted-by":"crossref","DOI":"10.1142\/S0218126619500841","volume":"28","author":"Marbaniang L.","year":"2019","journal-title":"J. Circuits, Syst. Comput."},{"key":"S0218126620502631BIB031","doi-asserted-by":"crossref","first-page":"26","DOI":"10.1109\/ICQNM.2009.25","volume-title":"Third Int. Conf. Quantum, Nano and Micro Technologies","author":"Hirata Y.","year":"2009"},{"issue":"10","key":"S0218126620502631BIB032","doi-asserted-by":"crossref","first-page":"3319","DOI":"10.1007\/s11128-013-0601-1","volume":"12","author":"AlFailakawi M.","year":"2013","journal-title":"Quantum Inf. Process."},{"key":"S0218126620502631BIB033","first-page":"41","volume-title":"Proc. 50th Annual Design Automation Conf.","author":"Shafaei A.","year":"2013"},{"key":"S0218126620502631BIB034","first-page":"489","volume-title":"19th Asia and South Pacific Design Automation Conf. (ASP-DAC)","author":"Wille R.","year":"2014"},{"key":"S0218126620502631BIB035","doi-asserted-by":"crossref","first-page":"58","DOI":"10.1016\/j.mejo.2018.08.011","volume":"81","author":"Biswal L.","year":"2018","journal-title":"Microelectron. J."},{"volume-title":"IEEE 50th Int. Symp. Multiple-Valued Logic-2020","author":"Bhattacharjee A.","key":"S0218126620502631BIB036"},{"issue":"10","key":"S0218126620502631BIB037","first-page":"1799","volume":"38","author":"Kun C.","year":"2018","journal-title":"IEEE Trans. Comput.-Aid. Des. Integr. Circuits Syst."},{"journal-title":"IEEE Trans. Comput.-Aid. Des. Integr. Circuits Syst.","year":"2019","author":"Kun C.","key":"S0218126620502631BIB038"},{"key":"S0218126620502631BIB039","first-page":"26","volume-title":"IEEE Int. Symp. Electronic System Design","author":"Bandyopadhyay C.","year":"2013"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126620502631","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,1,4]],"date-time":"2021-01-04T08:27:58Z","timestamp":1609748878000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126620502631"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,7,18]]},"references-count":36,"journal-issue":{"issue":"16","published-print":{"date-parts":[[2020,12,30]]}},"alternative-id":["10.1142\/S0218126620502631"],"URL":"https:\/\/doi.org\/10.1142\/s0218126620502631","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"type":"print","value":"0218-1266"},{"type":"electronic","value":"1793-6454"}],"subject":[],"published":{"date-parts":[[2020,7,18]]}}}