{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,7]],"date-time":"2026-03-07T13:14:37Z","timestamp":1772889277827,"version":"3.50.1"},"reference-count":24,"publisher":"World Scientific Pub Co Pte Ltd","issue":"02","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2021,2]]},"abstract":"<jats:p> This paper approximates the behavior of low-pass Bessel filter in fractional domain using the Interior search algorithm (ISA). A detailed analysis has been done with sensitivity analysis, W-plane stability and absolute percentage error (gain and cut-off frequency) to study the low-pass fractional order filter. The work focuses on the analysis and design of fractional filter with two cases. In the first case, the design and simulation of [Formula: see text] order low-pass Bessel filter has been done using MATLAB for [Formula: see text] value ranging from 0.1 to 0.9. SPICE simulation of 1.2, 1.5 and 1.9 order low-pass Bessel filter using fractional order capacitor of order [Formula: see text] with Tow\u2013Thomas biquad have been performed. In the second case, low-pass ([Formula: see text] order Bessel filter has been simulated and designed using MATLAB, where [Formula: see text] and [Formula: see text] are two fractional order elements of a different order. SPICE simulation for different values of [Formula: see text] and [Formula: see text] have been done using two fractional order capacitors of [Formula: see text] and [Formula: see text] order with Tow\u2013Thomas biquad. <\/jats:p>","DOI":"10.1142\/s0218126621500353","type":"journal-article","created":{"date-parts":[[2020,5,20]],"date-time":"2020-05-20T13:36:41Z","timestamp":1589981801000},"page":"2150035","source":"Crossref","is-referenced-by-count":18,"title":["Analysis and Design of Optimized Fractional Order Low-Pass Bessel Filter"],"prefix":"10.1142","volume":"30","author":[{"given":"Ashu","family":"Soni","sequence":"first","affiliation":[{"name":"Advanced Electronics Lab, Department of Electronics and Communication Engineering, Faculty of Technology (University of Delhi) New Delhi 110078, India"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2495-678X","authenticated-orcid":false,"given":"Maneesha","family":"Gupta","sequence":"additional","affiliation":[{"name":"Advanced Electronics Lab, Department of Electronics and Communication Engineering, Netaji Subhas University of Technology (Formerly NSIT) New Delhi 110078, India"}]}],"member":"219","published-online":{"date-parts":[[2020,8,27]]},"reference":[{"key":"S0218126621500353BIB001","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2013.2266753"},{"key":"S0218126621500353BIB002","doi-asserted-by":"publisher","DOI":"10.1016\/j.jare.2013.01.007"},{"key":"S0218126621500353BIB003","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2012.06.009"},{"key":"S0218126621500353BIB004","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-015-0226-y"},{"key":"S0218126621500353BIB005","doi-asserted-by":"publisher","DOI":"10.1109\/ICPEICES.2018.8897371"},{"key":"S0218126621500353BIB006","doi-asserted-by":"publisher","DOI":"10.1109\/ISPCC.2015.7375055"},{"key":"S0218126621500353BIB007","doi-asserted-by":"publisher","DOI":"10.1016\/j.dsp.2017.10.001"},{"key":"S0218126621500353BIB008","first-page":"1","volume":"45","author":"Soni A.","year":"2019","journal-title":"Arab. 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