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This paper proposes hardware acceleration based on FPGA of the Myers bit-parallelized algorithm, appropriately modified to be used in the extend stage of DNA alignment tools. The proposed design can be employed in conjunction with software functions, as it constitutes an extremely fast heterogeneous DNA alignment system. The implementation results show a speedup of up to [Formula: see text] relative to a sequential implementation only in software. In addition, due to the limited use of FPGA resources and the modular design, multiple modules can be used to completely populate the chip, further increasing the computing speed. <\/jats:p>","DOI":"10.1142\/s0218126621500870","type":"journal-article","created":{"date-parts":[[2020,8,3]],"date-time":"2020-08-03T08:41:40Z","timestamp":1596444100000},"page":"2150087","source":"Crossref","is-referenced-by-count":6,"title":["Bit-Vector-Based Hardware Accelerator for DNA Alignment Tools"],"prefix":"10.1142","volume":"30","author":[{"given":"Daniel Pacheco","family":"Bautista","sequence":"first","affiliation":[{"name":"Departamento de Ingenier\u00eda en Computaci\u00f3n, Universidad del Istmo, Avenida Universidad S\/N Bo. Santa Cruz, Tehuantepec, Oaxaca 70760, M\u00e9xico"}]},{"given":"Ricardo Carre\u00f1o","family":"Aguilera","sequence":"additional","affiliation":[{"name":"Departamento de Ingenier\u00eda en Computaci\u00f3n, Universidad del Istmo, Avenida Universidad S\/N Bo. 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