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Different parallelization and optimization techniques such as loop unrolling, loop pipelining, dataflow, and loop flattening are adopted and applied to explore the opportunities of any computation and storage that could be eliminated in order to achieve high efficiency. The results of the proposed optimized implementation achieve the highest performance compared with other related implementations. <\/jats:p>","DOI":"10.1142\/s0218126621501966","type":"journal-article","created":{"date-parts":[[2021,4,14]],"date-time":"2021-04-14T09:20:00Z","timestamp":1618392000000},"page":"2150196","source":"Crossref","is-referenced-by-count":10,"title":["High-Performance Implementation of Wideband Coherent Signal-Subspace (CSS)-Based DOA Algorithm on FPGA"],"prefix":"10.1142","volume":"30","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8039-190X","authenticated-orcid":false,"given":"Amin","family":"Jarrah","sequence":"first","affiliation":[{"name":"Department of Computer Engineering, Hijjawi Faculty for Engineering Technology, Yarmouk University, Irbid 21163, Jordan"}]},{"given":"Abedalmuhdi","family":"Almomany","sequence":"additional","affiliation":[{"name":"Department of Computer Engineering, Hijjawi Faculty for Engineering Technology, Yarmouk University, Irbid 21163, Jordan"}]},{"given":"Anas M. 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