{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T14:07:42Z","timestamp":1753884462450,"version":"3.41.2"},"reference-count":37,"publisher":"World Scientific Pub Co Pte Ltd","issue":"12","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2021,9,30]]},"abstract":"<jats:p> In this paper, a comparator and an operational amplifier considered as essential components, constituting a 10-bit 50-MHz pipeline Analog-to-Digital Converter for Wireless Local Area Network (WLAN) applications, are described and designed. All post-layout and Monte-Carlo simulations, using a 0.35[Formula: see text][Formula: see text]m CMOS AMS process technology with [Formula: see text][Formula: see text]V supply voltage and an input common-mode range of [Formula: see text][Formula: see text]V, are achieved. An improved clocked comparator with a dynamic latch, based on a switched capacitor network, using the current reuse technique for slew rate enhancement and positive feedback for offset voltage compensation, is presented. The operational amplifier, consisting of a fully differential folded cascode operational transconductance amplifier, providing high-gain and good stability, is exhibited. A new frequency compensation technique, based on active resistors, is used to improve amplifier phase-margin. The Monte-Carlo performance results of the designed clocked comparator provide an offset voltage of [Formula: see text][Formula: see text]mV with [Formula: see text][Formula: see text]mV 3[Formula: see text] deviation, a slew rate of [Formula: see text]V\/ns with [Formula: see text]V\/ns 3[Formula: see text] deviation, and a propagation delay of [Formula: see text][Formula: see text]ns with [Formula: see text][Formula: see text]ns 3[Formula: see text] deviation. Monte-Carlo performance results of the designed operational amplifier provide a phase-margin of [Formula: see text], and a high-gain of [Formula: see text]dB with [Formula: see text] and [Formula: see text]dB 3[Formula: see text], respectively, by using [Formula: see text] load capacitance. <\/jats:p>","DOI":"10.1142\/s0218126621502145","type":"journal-article","created":{"date-parts":[[2021,2,10]],"date-time":"2021-02-10T10:53:18Z","timestamp":1612954398000},"source":"Crossref","is-referenced-by-count":1,"title":["An Improved Comparator Based on Current Reuse and a New Frequency Compensation Technique used in an OTA for Pipeline ADCs"],"prefix":"10.1142","volume":"30","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4665-1920","authenticated-orcid":false,"given":"M. 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