{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T13:20:08Z","timestamp":1753881608935,"version":"3.41.2"},"reference-count":16,"publisher":"World Scientific Pub Co Pte Ltd","issue":"14","funder":[{"name":"Government of India","award":["VIS-PHD-1708"],"award-info":[{"award-number":["VIS-PHD-1708"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2021,11]]},"abstract":"<jats:p> With the emergence of the internet-of-things (IoT), many devices process data through the IEEE 802.11 wireless networks. To satisfy the increased data processing, the wireless fidelity (Wi-Fi) networks must have sufficient capacity. IEEE 802.11ax is formulated to provide higher data processing capabilities for IoT applications. The IEEE 802.11ax receiver operating at 5[Formula: see text]GHz must be able to withstand interference from nearby IoT applications. Hence, the low-noise amplifier (LNA) employed in such receivers must have a high input-referred third-order intercept point (IIP3). This paper aims to present a wideband LNA operating at 5[Formula: see text]GHz with high IIP3 for modern IoT transceivers using IEEE 802.11ax protocol. The LNA is designed and implemented in UMC 65[Formula: see text]nm CMOS technology using the Cadence virtuoso design tool. The proposed LNA can provide a maximum gain of 17.64[Formula: see text]dB while consuming 8.18[Formula: see text]mW of power from a 1.2[Formula: see text]V supply. It can be noted that the minimum noise figure (NF) achieved is 3.67[Formula: see text]dB and the corresponding IIP3 is 9.44[Formula: see text]dBm at 5[Formula: see text]GHz from the pre-layout simulations. <\/jats:p>","DOI":"10.1142\/s0218126621502650","type":"journal-article","created":{"date-parts":[[2021,4,19]],"date-time":"2021-04-19T15:47:42Z","timestamp":1618847262000},"source":"Crossref","is-referenced-by-count":0,"title":["A 4\u20136 GHz Single-Ended to Differential-Ended Low-Noise Amplifier for IEEE 802.11ax Wireless Applications with Inherent Complementary Distortion Cancellation"],"prefix":"10.1142","volume":"30","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9856-8248","authenticated-orcid":false,"given":"S.","family":"Chrisben Gladson","sequence":"first","affiliation":[{"name":"Renesas Electronics India Pvt. Ltd, Bangalore, 560008, India"}]},{"given":"P.","family":"Siva Prasad","sequence":"additional","affiliation":[{"name":"Microchip Technology, 500082, India"}]},{"given":"V.","family":"Thenmozhi","sequence":"additional","affiliation":[{"name":"RF CMOS IC Design Laboratory, NIT \u2014 Tiruchirappalli, 620015, India"}]},{"given":"M.","family":"Bhaskar","sequence":"additional","affiliation":[{"name":"RF CMOS IC Design Laboratory, NIT \u2014 Tiruchirappalli, 620015, India"}]}],"member":"219","published-online":{"date-parts":[[2021,5,15]]},"reference":[{"key":"S0218126621502650BIB001","doi-asserted-by":"publisher","DOI":"10.1109\/MWC.2016.7422404"},{"key":"S0218126621502650BIB006","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-019-01399-w"},{"key":"S0218126621502650BIB008","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-019-01423-z"},{"key":"S0218126621502650BIB009","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2019.02.012"},{"key":"S0218126621502650BIB010","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cds.2018.5291"},{"key":"S0218126621502650BIB011","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2019.04.014"},{"key":"S0218126621502650BIB012","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2019.06.003"},{"key":"S0218126621502650BIB013","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-019-01547-2"},{"key":"S0218126621502650BIB014","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2019.104659"},{"key":"S0218126621502650BIB015","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2019.2949796"},{"key":"S0218126621502650BIB016","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-020-01665-2"},{"journal-title":"Microsyst. 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ESSCIRC","year":"2005","author":"Kim N.","key":"S0218126621502650BIB018"},{"volume-title":"Design of Analog CMOS Integrated Circuits","year":"2002","author":"Behzad R.","key":"S0218126621502650BIB019"},{"volume-title":"RF Microelectronics","year":"2012","author":"Behzad R.","key":"S0218126621502650BIB020"},{"key":"S0218126621502650BIB021","series-title":"Prentice-Hall Electronics and VLSI Series","volume-title":"VLSI for Wireless Communications","author":"Bosco L.","year":"2002"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126621502650","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,12,16]],"date-time":"2021-12-16T14:01:17Z","timestamp":1639663277000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126621502650"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5,15]]},"references-count":16,"journal-issue":{"issue":"14","published-print":{"date-parts":[[2021,11]]}},"alternative-id":["10.1142\/S0218126621502650"],"URL":"https:\/\/doi.org\/10.1142\/s0218126621502650","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"type":"print","value":"0218-1266"},{"type":"electronic","value":"1793-6454"}],"subject":[],"published":{"date-parts":[[2021,5,15]]},"article-number":"2150265"}}