{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T14:15:31Z","timestamp":1753884931246,"version":"3.41.2"},"reference-count":44,"publisher":"World Scientific Pub Co Pte Ltd","issue":"10","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2022,7,15]]},"abstract":"<jats:p> The design of reversible logic circuits has received considerable attention in recent times for their potential use in implementing quantum computers. A fault model, namely, the Missing-Gate Fault (MGF) model, has been found to be more suitable for modeling defects in quantum circuits as compared to the classical fault models used for testing conventional CMOS circuits. In this paper, we propose two design-for-testability techniques with universal test set to detect MGFs in a reversible circuit. In these techniques, an [Formula: see text] reversible circuit implemented with [Formula: see text]-CNOT gates is transformed to a testable design with addition of two extra inputs lines and some additional gates, which uses a universal test set of size [Formula: see text] to detect the MGFs. The proposed DFT techniques are compared with earlier works and it has been shown that these techniques outperform the earlier techniques with respect to quantum cost overhead and percentage detection of the different MGFs. <\/jats:p>","DOI":"10.1142\/s0218126622501286","type":"journal-article","created":{"date-parts":[[2021,12,14]],"date-time":"2021-12-14T02:01:40Z","timestamp":1639447300000},"source":"Crossref","is-referenced-by-count":3,"title":["DFT with Universal Test Set for All Missing Gate Faults in Reversible Circuits"],"prefix":"10.1142","volume":"31","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2029-132X","authenticated-orcid":false,"given":"Joyati","family":"Mondal","sequence":"first","affiliation":[{"name":"A. K. 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