{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T13:06:06Z","timestamp":1753880766558,"version":"3.41.2"},"reference-count":20,"publisher":"World Scientific Pub Co Pte Ltd","issue":"10","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2022,7,15]]},"abstract":"<jats:p> This paper presents a design and simulation of a low-noise, low-voltage, and low-power complementary metal oxide semiconductor (CMOS) logarithmic amplifier for biomedical applications like digital hearing aid applications. The amplifier block of analog front end is used as a logarithmic amplifier, based on the progressive-compression parallel-summation architecture with DC offset cancelation by adding an off-chip coupling capacitor at each stage. A fully nontailed differential limiting amplifier with bulk-driven input pair is used to achieve larger voltage gain and low voltage operation. The proposed logarithmic amplifier was designed and simulated with process parameters variation in standard 0.18-[Formula: see text]m CMOS technology. The circuit operates with a single 0.4-V power supply voltage and dissipates 0.832[Formula: see text][Formula: see text]W. The simulated input dynamic range is about 60[Formula: see text]dB, which covers the input amplitudes ranging from 1[Formula: see text][Formula: see text]V to 10[Formula: see text]mV, and the [Formula: see text]3-dB bandwidth of the amplifier is from 400[Formula: see text]Hz to 8.27[Formula: see text]kHz with simulated total input-referred noise is 0.731[Formula: see text][Formula: see text]V@8 kHz. <\/jats:p>","DOI":"10.1142\/s0218126622501882","type":"journal-article","created":{"date-parts":[[2022,4,14]],"date-time":"2022-04-14T07:13:51Z","timestamp":1649920431000},"source":"Crossref","is-referenced-by-count":1,"title":["0.4-V Bulk Driven Logarithmic Amplifier for Ultra-Low-Power Biomedical Applications"],"prefix":"10.1142","volume":"31","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0709-5383","authenticated-orcid":false,"given":"Dipesh","family":"Panchal","sequence":"first","affiliation":[{"name":"Electronics and Communication Department, Nirma University, Ahmedabad, Gujarat 382481, India"}]},{"given":"Amisha","family":"Naik","sequence":"additional","affiliation":[{"name":"Electronics and Communication Department, Nirma University, Ahmedabad, Gujarat 382481, India"}]}],"member":"219","published-online":{"date-parts":[[2022,4,13]]},"reference":[{"key":"S0218126622501882BIB001","first-page":"166","volume-title":"5th Int. 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