{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T14:04:34Z","timestamp":1753884274770,"version":"3.41.2"},"reference-count":20,"publisher":"World Scientific Pub Co Pte Ltd","issue":"05","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2023,3,30]]},"abstract":"<jats:p> Network-on-Chip (NoC) is an emerging and efficient on-chip interconnection network. NoC is expected to be the communication backbone of next-generation Multi-processor System-on-Chip (MPSoC) architectures. Topology is a crucial design aspect of NoC, as it affects the performance of the interconnection network. This paper proposes a novel, scalable, hybrid Hexagonal Star (HS) topology for on-chip interconnection networks. Properties of the proposed topology have been explored and compared with those of Mesh, Torus and Honeycomb Mesh topologies. The performance of the Hexagonal Star topology has been evaluated and compared with that of Mesh topology for different scenarios. The comparative studies of topological properties have indicated that the proposed topology can be a potential choice for on-chip interconnection networks. The simulation results have shown that the proposed topology outperforms Mesh topology in terms of latency for low traffic loads. For different traffic patterns and traffic loads, HS topology has registered a reduction of packet latency ranging from 15% to 50% and from 9% to 23% for 18 nodes and 32 nodes, respectively, compared to Mesh topology. <\/jats:p>","DOI":"10.1142\/s0218126623500767","type":"journal-article","created":{"date-parts":[[2022,9,10]],"date-time":"2022-09-10T05:14:01Z","timestamp":1662786841000},"source":"Crossref","is-referenced-by-count":2,"title":["A Novel Hybrid Hexagonal Star Topology for On-Chip Interconnection Networks"],"prefix":"10.1142","volume":"32","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6781-1009","authenticated-orcid":false,"given":"V.","family":"Lakshmi Kiranmai","sequence":"first","affiliation":[{"name":"Department of Electronics & Communication Engineering, National Institute of Technology Warangal, Hanumakonda, Warangal 506004, Telangana, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"B. K. 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