{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T14:05:18Z","timestamp":1753884318984,"version":"3.41.2"},"reference-count":24,"publisher":"World Scientific Pub Co Pte Ltd","issue":"10","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2023,7,15]]},"abstract":"<jats:p> This paper presents a modified energy-efficient Dual Mode Transmission Gate Diffusion Input (DMTGDI) design and is termed as M-DMTGDI. A contention issue in dynamic mode operation of existing DMTGDI design and DMPL design is identified and illustrated through mathematical formulation and simulations. To resolve this concern, the pre-charge\/pre-discharge transistor in existing DMTGDI design is replaced by dual mode inverter in the proposal. The functional verification and performance comparison of NAND, NOR, XOR gates and 1-bit full adder based on proposed M-DMTGDI is carried out using 90 nm BSIM4 model card for bulk CMOS using Symica DE tool. The performance of the circuits is evaluated in terms of power, delay and Power Delay Product (PDP) in both static and dynamic modes. The variation of PDP with the ratio of the time the circuit is designed to run in dynamic mode against static mode is also investigated to analyze the energy efficiency of the M-DMTGDI design. The proposed approach offers maximum PDP reduction of 33.52%, 99.39% and 96.61% for 2-input gates as compared to their footed DML, DMPL and DMTGDI counterparts, respectively. The reduction in PDP is quite significant in 1-bit full adder circuit where the corresponding values are 94.18%, 99.41% and 99.79%, respectively. <\/jats:p>","DOI":"10.1142\/s0218126623501712","type":"journal-article","created":{"date-parts":[[2022,11,27]],"date-time":"2022-11-27T17:27:57Z","timestamp":1669570077000},"source":"Crossref","is-referenced-by-count":0,"title":["Modified Dual Mode Transmission Gate Diffusion Input Logic for Improving Energy Efficiency"],"prefix":"10.1142","volume":"32","author":[{"given":"Neetika","family":"Yadav","sequence":"first","affiliation":[{"name":"Department of Electronics and Communication Engineering, Delhi Technological University, Delhi 110042, India"},{"name":"Amity Institute of Space Science and Technology, Amity University, Noida 201303, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2911-7061","authenticated-orcid":false,"given":"Neeta","family":"Pandey","sequence":"additional","affiliation":[{"name":"Department of Electronics and Communication Engineering, Delhi Technological University, Delhi 110042, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Deva","family":"Nand","sequence":"additional","affiliation":[{"name":"Department of Electronics and Communication Engineering, Delhi Technological University, Delhi 110042, India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2022,12,28]]},"reference":[{"volume-title":"Enabling the Internet of Things: From Integrated Circuits to Integrated Systems","year":"2018","author":"Alioto M.","key":"S0218126623501712BIB002"},{"volume-title":"CMOS Digital Integrated Circuits Analysis & Design","year":"2014","author":"Kang S. M.","key":"S0218126623501712BIB003"},{"volume-title":"High Speed CMOS Design Styles","year":"1998","author":"Bernstein K.","key":"S0218126623501712BIB004"},{"volume-title":"CMOS VLSI Design: A Circuits and Systems Perspective","year":"2015","author":"Weste N. H. E.","key":"S0218126623501712BIB005"},{"key":"S0218126623501712BIB006","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-030-40786-5","volume-title":"Dual Mode Logic: A New Paradigm for Digital IC Design","author":"Levi I.","year":"2021","edition":"1"},{"key":"S0218126623501712BIB007","doi-asserted-by":"crossref","first-page":"343","DOI":"10.1109\/JPROC.2007.911072","volume":"96","author":"Calhoun B. H.","year":"2008","journal-title":"Proc. IEEE"},{"key":"S0218126623501712BIB008","doi-asserted-by":"crossref","first-page":"3089","DOI":"10.1109\/ACCESS.2016.2514398","volume":"3","author":"Yuzhaninov V.","year":"2015","journal-title":"IEEE Access"},{"key":"S0218126623501712BIB009","doi-asserted-by":"crossref","first-page":"979","DOI":"10.1109\/TVLSI.2012.2198678","volume":"21","author":"Kaizerman A.","year":"2013","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"S0218126623501712BIB010","doi-asserted-by":"crossref","first-page":"258","DOI":"10.1109\/ACCESS.2013.2262015","volume":"1","author":"Levi I.","year":"2013","journal-title":"IEEE Access"},{"key":"S0218126623501712BIB011","doi-asserted-by":"crossref","first-page":"553","DOI":"10.1016\/j.mejo.2013.03.005","volume":"44","author":"Levi I.","year":"2013","journal-title":"Microelectron. J."},{"first-page":"3037","volume-title":"IEEE Int. Symp. Circuits and Systems (ISCAS)","author":"Levi I.","key":"S0218126623501712BIB012"},{"first-page":"1","volume-title":"IEEE Int. Symp. Circuits and Systems (ISCAS)","author":"Taco R.","key":"S0218126623501712BIB013"},{"key":"S0218126623501712BIB014","doi-asserted-by":"crossref","first-page":"1052","DOI":"10.3390\/electronics10091052","volume":"10","author":"Vicu\u00f1a K.","year":"2021","journal-title":"Electronics"},{"key":"S0218126623501712BIB015","doi-asserted-by":"crossref","first-page":"314","DOI":"10.1109\/LSSC.2020.3011636","volume":"3","author":"Shavit N.","year":"2020","journal-title":"IEEE Solid-State Circuits Lett."},{"key":"S0218126623501712BIB016","doi-asserted-by":"crossref","first-page":"104269","DOI":"10.1016\/j.micpro.2021.104269","volume":"84","author":"Yadav N.","year":"2021","journal-title":"Microprocess. Microsyst."},{"key":"S0218126623501712BIB017","doi-asserted-by":"crossref","first-page":"560","DOI":"10.1109\/JSSC.2018.2882139","volume":"54","author":"Taco R.","year":"2018","journal-title":"IEEE J. Solid-State Circuits"},{"first-page":"41","volume-title":"Int. Conf. Multimedia, Signal Processing and Communication Technologies (IMPACT)","author":"Yadav N.","key":"S0218126623501712BIB018"},{"key":"S0218126623501712BIB019","doi-asserted-by":"crossref","first-page":"194","DOI":"10.1016\/j.vlsi.2016.06.004","volume":"55","author":"Pashaki E. R.","year":"2016","journal-title":"Integration"},{"first-page":"1","volume-title":"IEEE Int. Symp. Circuits and Systems (ISCAS)","author":"Stanger I.","key":"S0218126623501712BIB020"},{"key":"S0218126623501712BIB021","first-page":"3576","volume":"6","author":"Sravani P.","year":"2017","journal-title":"Int. J. Sci. Eng. Technol. Res."},{"first-page":"1","volume-title":"Int. Conf. Intelligent Technologies (CONIT)","author":"Chauhan A.","key":"S0218126623501712BIB022"},{"key":"S0218126623501712BIB023","doi-asserted-by":"crossref","first-page":"1991","DOI":"10.1007\/s11554-020-00992-x","volume":"17","author":"Jacob S.","year":"2020","journal-title":"J. Real Time Image Process."},{"first-page":"1","volume-title":"IEEE Int. Symp. Circuits and Systems (ISCAS)","author":"Yavits L.","key":"S0218126623501712BIB024"},{"first-page":"1","volume-title":"IEEE Int. Symp. Circuits and Systems (ISCAS)","author":"Taco R.","key":"S0218126623501712BIB025"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126623501712","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,6,15]],"date-time":"2023-06-15T03:04:03Z","timestamp":1686798243000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/10.1142\/S0218126623501712"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,12,28]]},"references-count":24,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2023,7,15]]}},"alternative-id":["10.1142\/S0218126623501712"],"URL":"https:\/\/doi.org\/10.1142\/s0218126623501712","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"type":"print","value":"0218-1266"},{"type":"electronic","value":"1793-6454"}],"subject":[],"published":{"date-parts":[[2022,12,28]]},"article-number":"2350171"}}