{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,24]],"date-time":"2026-04-24T15:10:43Z","timestamp":1777043443140,"version":"3.51.4"},"reference-count":26,"publisher":"World Scientific Pub Co Pte Ltd","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2024,3,15]]},"abstract":"<jats:p>In a resource-constrained environment of the 21st century, the use of hardware-based reconfigurable systems such as Field Programmable Gate Array (FPGAs) is considered an effective way to enhance information security. In comparison with traditional custom circuitry that does not give a flexible approach, it is observed that the reconfigurable hardware shows an excellent potential for cyber security by increasing hardware speeds and flexibility. Therefore, in a quest to integrate multi-core systems, the Network-on-Chip (NoC) has become one of the popular widespread techniques to maximize router security. Due to the significant overhead of chip space and the power consumption of the routers, it is substantially more expensive to construct as compared to a bus-based system. The control component (CC) interacts with the networks that inject packets based on router switching and activity. These control components are coupled with each network to produce a system of controlled networks. The system is further linked with CFM or a Centralized Fabric Manager, which serves as the network\u2019s focal point. After that, the CFM runs the algorithm regularly. The analytic parameters comprise flip flop, power, latency, number of lookup tables (LUTs), and throughput. In the proposed method, the number of LUTs is [Formula: see text], the flip flop is [Formula: see text], the power is [Formula: see text]W, the latency is 5941[Formula: see text]ns, and the planned throughput is 0.56 flits\/cycle. Results indicate that the crossbar switch reduces errors and minimizes the delay in the architecture\u2019s outcome level, which further overcomes the descriptions of performance, power throughput, and area delay parameters. The findings of the research can be useful to enhance information security among lightweight devices besides minimizing the chances of network attacks in today\u2019s dynamic and complex cyberspace.<\/jats:p>","DOI":"10.1142\/s0218126624500646","type":"journal-article","created":{"date-parts":[[2023,7,28]],"date-time":"2023-07-28T15:59:42Z","timestamp":1690559982000},"source":"Crossref","is-referenced-by-count":4,"title":["A Deep Learning Network-on-Chip (NoC)-Based Switch-Router to Enhance Information Security in Resource-Constrained Devices"],"prefix":"10.1142","volume":"33","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6773-6712","authenticated-orcid":false,"given":"Ali M. Al","family":"Shahrani","sequence":"first","affiliation":[{"name":"Faculty of Computer Studies, Arab Open University, Saudi Arabia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2348-8577","authenticated-orcid":false,"given":"Ali","family":"Rizwan","sequence":"additional","affiliation":[{"name":"Department of Industrial Engineering, Faculty of Engineering, King Abdulaziz University, Jeddah 21589, Saudi Arabia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6013-069X","authenticated-orcid":false,"given":"Abdullah","family":"Algarni","sequence":"additional","affiliation":[{"name":"Information Technology Division, Institute of Public Administration, Riyadh 11141, Saudi Arabia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3975-5879","authenticated-orcid":false,"given":"Khalid A.","family":"Alissa","sequence":"additional","affiliation":[{"name":"Saudi Aramco Cybersecurity Chair, Networks and Communications Department, College of Computer Science and Information Technology, Imam Abdulrahman Bin Faisal University, P.O. Box 1982, Dammam 31441, Saudi Arabia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5106-7609","authenticated-orcid":false,"given":"Mohammad","family":"Shabaz","sequence":"additional","affiliation":[{"name":"Model Institute of Engineering and Technology, Jammu, J&K, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3262-1894","authenticated-orcid":false,"given":"Bhupesh Kumar","family":"Singh","sequence":"additional","affiliation":[{"name":"B. S. Anangpuria Educational Institute, Alampur, Ballabgarh-Sohna Major District Road, Faridabad-121004, Delhi-NCR, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2192-6852","authenticated-orcid":false,"given":"John","family":"Zaki","sequence":"additional","affiliation":[{"name":"Department of Computer and Systems, Faculty of Engineering, Mansoura University, Mansoura, Egypt"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2023,8,31]]},"reference":[{"key":"S0218126624500646BIB001","doi-asserted-by":"publisher","DOI":"10.25103\/jestr.143.09"},{"key":"S0218126624500646BIB002","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2019.101664"},{"key":"S0218126624500646BIB003","first-page":"61","volume-title":"2021 15th IEEE\/ACM Int. Symposium Networks-on-Chip (NOCS)","author":"Gonz\u00e1lez J. A.","year":"2021"},{"key":"S0218126624500646BIB004","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-020-03220-2"},{"key":"S0218126624500646BIB005","doi-asserted-by":"publisher","DOI":"10.1145\/3289602.3293908"},{"key":"S0218126624500646BIB006","doi-asserted-by":"publisher","DOI":"10.1016\/S0065-2458(04)63002-6"},{"key":"S0218126624500646BIB007","first-page":"764","volume":"63","author":"Kao Y. H.","year":"2012","journal-title":"IEEE Trans. Comput."},{"issue":"2","key":"S0218126624500646BIB008","first-page":"534","volume":"3","author":"Kumar C. A.","year":"2014","journal-title":"Int. J. Adv. Res. Comput. Eng. Technol."},{"key":"S0218126624500646BIB009","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351101"},{"key":"S0218126624500646BIB010","doi-asserted-by":"publisher","DOI":"10.1145\/3480961"},{"key":"S0218126624500646BIB011","doi-asserted-by":"publisher","DOI":"10.1145\/3391442"},{"key":"S0218126624500646BIB012","doi-asserted-by":"publisher","DOI":"10.1088\/1757-899X\/925\/1\/012069"},{"key":"S0218126624500646BIB013","doi-asserted-by":"publisher","DOI":"10.1109\/ICAE47758.2019.9221675"},{"key":"S0218126624500646BIB014","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2935051"},{"key":"S0218126624500646BIB015","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-018-0614-6"},{"key":"S0218126624500646BIB016","doi-asserted-by":"publisher","DOI":"10.1109\/ICEPT52650.2021.9567983"},{"key":"S0218126624500646BIB017","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2019.00031"},{"key":"S0218126624500646BIB018","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2019.12.005"},{"key":"S0218126624500646BIB019","doi-asserted-by":"publisher","DOI":"10.1109\/SLIP52707.2021.00019"},{"key":"S0218126624500646BIB020","doi-asserted-by":"publisher","DOI":"10.1109\/RusAutoCon52004.2021.9537317"},{"key":"S0218126624500646BIB021","first-page":"8868842","volume":"2020","author":"Garg P.","year":"2020","journal-title":"Mob. Inf. Syst."},{"issue":"27","key":"S0218126624500646BIB022","first-page":"1","volume":"2020","author":"Yitayih K. A.","year":"2020","journal-title":"J. Comput. Netw. Commun."},{"key":"S0218126624500646BIB023","doi-asserted-by":"publisher","DOI":"10.1007\/s11277-021-08780-x"},{"key":"S0218126624500646BIB024","doi-asserted-by":"crossref","first-page":"509465","DOI":"10.1155\/2012\/509465","volume":"2012","author":"Tsai W.-C.","year":"2012","journal-title":"J. Electr. Comput. Eng."},{"key":"S0218126624500646BIB025","first-page":"18849","volume":"9","author":"Merline J.","year":"2014","journal-title":"Int. J. Appl. Eng. Res."},{"key":"S0218126624500646BIB026","doi-asserted-by":"publisher","DOI":"10.1109\/CCECE.2006.277852"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126624500646","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,10,25]],"date-time":"2024-10-25T07:40:31Z","timestamp":1729842031000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/10.1142\/S0218126624500646"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,8,31]]},"references-count":26,"journal-issue":{"issue":"04","published-print":{"date-parts":[[2024,3,15]]}},"alternative-id":["10.1142\/S0218126624500646"],"URL":"https:\/\/doi.org\/10.1142\/s0218126624500646","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,8,31]]},"article-number":"2450064"}}