{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T14:09:00Z","timestamp":1753884540229,"version":"3.41.2"},"reference-count":23,"publisher":"World Scientific Pub Co Pte Ltd","issue":"08","funder":[{"name":"Key special projects of National Key R&D","award":["2019YFB2204601"],"award-info":[{"award-number":["2019YFB2204601"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2025,5,30]]},"abstract":"<jats:p> This paper presents a low-power fourth-order single-bit switched capacitor sigma-delta modulator implemented by 180[Formula: see text]nm CMOS technology. In the modulator, the Floating Inverter Amplifier (FIA) with Correlated Level Shift (CLS) technique increasing gain is employed to decrease the modulators power consumption, and a two-tap Finite Impulse Response (FIR) is used in a feedback loop to reduce the integrator output swings. With the help of a simple digital circuit, the mismatches influence on the first-order integrators capacitor is mitigated because of reusing the sampling capacitor. Additionally, the work exploits the charge-sharing module to reduce the integrating capacitors size. The proposed modulator achieves 97.8[Formula: see text]dB peak Signal-to-Noise and Distortion Ratio (SNDR) at 102.4[Formula: see text]kHz over a bandwidth of 400[Formula: see text]Hz under the supply voltage of 1.2[Formula: see text]V VDD and 1.2[Formula: see text]V reference voltage while consuming a total power consumption of 3.94[Formula: see text][Formula: see text]W. <\/jats:p>","DOI":"10.1142\/s0218126625500537","type":"journal-article","created":{"date-parts":[[2024,8,16]],"date-time":"2024-08-16T10:09:54Z","timestamp":1723802994000},"source":"Crossref","is-referenced-by-count":0,"title":["Low-Power Design of \u03a3-\u0394 Modulator Utilizing FIA with Charge-Sharing Module and Two-Tap FIR Filter Embedded"],"prefix":"10.1142","volume":"34","author":[{"ORCID":"https:\/\/orcid.org\/0009-0006-2342-1678","authenticated-orcid":false,"given":"Xiaofeng","family":"Chen","sequence":"first","affiliation":[{"name":"School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P.\u00a0R.\u00a0China"},{"name":"Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P.\u00a0R.\u00a0China"},{"name":"R&D Center for Integrated Circuit Engineering of Fujian Province, Xiamen, Fujian 361005, P.\u00a0R.\u00a0China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9571-2443","authenticated-orcid":false,"given":"Wenrun","family":"Xiao","sequence":"additional","affiliation":[{"name":"School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P.\u00a0R.\u00a0China"},{"name":"Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P.\u00a0R.\u00a0China"},{"name":"R&D Center for Integrated Circuit Engineering of Fujian Province, Xiamen, Fujian 361005, P.\u00a0R.\u00a0China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1431-0512","authenticated-orcid":false,"given":"Xianming","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P.\u00a0R.\u00a0China"},{"name":"Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P.\u00a0R.\u00a0China"},{"name":"R&D Center for Integrated Circuit Engineering of Fujian Province, Xiamen, Fujian 361005, P.\u00a0R.\u00a0China"}]},{"given":"Xiaofeng","family":"Lin","sequence":"additional","affiliation":[{"name":"School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P.\u00a0R.\u00a0China"},{"name":"Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P.\u00a0R.\u00a0China"}]},{"given":"Chao","family":"Huang","sequence":"additional","affiliation":[{"name":"Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P.\u00a0R.\u00a0China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5915-4088","authenticated-orcid":false,"given":"Donghui","family":"Guo","sequence":"additional","affiliation":[{"name":"School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P.\u00a0R.\u00a0China"},{"name":"Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P.\u00a0R.\u00a0China"},{"name":"R&D Center for Integrated Circuit Engineering of Fujian Province, Xiamen, Fujian 361005, P.\u00a0R.\u00a0China"}]}],"member":"219","published-online":{"date-parts":[[2025,3,7]]},"reference":[{"key":"S0218126625500537BIB001","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-019-01532-9"},{"key":"S0218126625500537BIB002","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2275659"},{"key":"S0218126625500537BIB003","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2010973"},{"key":"S0218126625500537BIB004","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3208144"},{"key":"S0218126625500537BIB005","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3171790"},{"key":"S0218126625500537BIB006","first-page":"2759","volume":"70","author":"Matsuoka A.","year":"2023","journal-title":"IEEE Trans. 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