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The compact CLEFIA circuit uses an integrated generalized Feistel network (GFN) structure that allows multiple tasks to share resources and requires only four registers for the whole GFN process by data path folding technique. All of the circuits are implemented on the Artix-7 field programmable gate array platform, and the test results show a throughput of 208[Formula: see text]Mbps with 226 slices for CLEFIA, a throughput of 4.03[Formula: see text]Gbps with 1403 slices for Keccak-512, and a throughput of 11.5[Formula: see text]Gbps with 1535 slices for CLEFIA-Kec. They achieve an optimal balance between resource utilization and throughput. <\/jats:p>","DOI":"10.1142\/s0218126625501671","type":"journal-article","created":{"date-parts":[[2024,12,20]],"date-time":"2024-12-20T09:49:49Z","timestamp":1734688189000},"source":"Crossref","is-referenced-by-count":0,"title":["A Lightweight Authenticated Encryption Algorithm Based on Compact CLEFIA Block Cipher"],"prefix":"10.1142","volume":"34","author":[{"ORCID":"https:\/\/orcid.org\/0009-0002-9871-7335","authenticated-orcid":false,"given":"Meiyu","family":"Liang","sequence":"first","affiliation":[{"name":"School of Electrical and Electronic Engineering, Anhui Institute of Information Technology, No. 1, Yonghe Road, Wuhu, Anhui 241000\/Wanzhi Zone, P.\u00a0R.\u00a0China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0000-2869-9675","authenticated-orcid":false,"given":"Tao","family":"Ji","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Anhui Institute of Information Technology, No. 1, Yonghe Road, Wuhu, Anhui 241000\/Wanzhi Zone, P.\u00a0R.\u00a0China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-0550-2303","authenticated-orcid":false,"given":"Yin","family":"Yuan","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Anhui Institute of Information Technology, No. 1, Yonghe Road, Wuhu, Anhui 241000\/Wanzhi Zone, P.\u00a0R.\u00a0China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5793-3985","authenticated-orcid":false,"given":"Xin","family":"Cheng","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Hefei University of Technology, No. 485, Danxia Road, Hefei, Anhui 230009\/Jingkai Zone, P.\u00a0R.\u00a0China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3510-4585","authenticated-orcid":false,"given":"Zhang","family":"Zhang","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Hefei University of Technology, No. 485, Danxia Road, Hefei, Anhui 230009\/Jingkai Zone, P.\u00a0R.\u00a0China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-6479-2864","authenticated-orcid":false,"given":"Lixiang","family":"Ma","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Anhui Institute of Information Technology, No. 1, Yonghe Road, Wuhu, Anhui 241000\/Wanzhi Zone, P.\u00a0R.\u00a0China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2025,2,26]]},"reference":[{"key":"S0218126625501671BIB001","doi-asserted-by":"publisher","DOI":"10.1109\/JIOT.2023.3325583"},{"key":"S0218126625501671BIB002","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2023.3306420"},{"key":"S0218126625501671BIB003","first-page":"1","volume":"35","author":"Bhagat V.","year":"2022","journal-title":"Conc. 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