{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,24]],"date-time":"2025-12-24T12:21:47Z","timestamp":1766578907901,"version":"3.44.0"},"reference-count":25,"publisher":"World Scientific Pub Co Pte Ltd","issue":"17","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2025,11,30]]},"abstract":"<jats:p> In this paper, we introduce a hardware accelerator for the Low-Light Image Enhancement (LLIE) network. This accelerator significantly enhances the effectiveness of LLIE while reducing computation time and power consumption. Specifically designed for the LLIE accelerator, we propose an RGB parallel processing algorithm for LLIE. LLIE can estimate individual channel components. The three channels share weights through a pulse array and converge toward the same direction via a self-calibration module. We design hardware acceleration units for different operators in LLIE and conduct testing. LLIE is deployed on Xilinx\u2019s XCU102, with model inference parameters ranging from 0.96[Formula: see text]k to 3456[Formula: see text]k. The latency of LLIE on Field-Programmable Gate Array (FPGA) ranges from 0.19 to 7.69[Formula: see text]ms, with power consumption ranging from 0.4 to 1.68[Formula: see text]W. Compared to GPUs with similar performance, LLIE achieves approximately 20 times acceleration on FPGA, with power consumption only 3[Formula: see text] to 10[Formula: see text] of that of GPUs. Experimental results indicate that LLIE\u2019s performance on FPGA improves with increasing model parameters. This system offers significant advantages in low-light image processing and promises to greatly facilitate real-time processing of low-light images in the future. <\/jats:p>","DOI":"10.1142\/s0218126625503505","type":"journal-article","created":{"date-parts":[[2025,5,13]],"date-time":"2025-05-13T04:52:58Z","timestamp":1747111978000},"source":"Crossref","is-referenced-by-count":1,"title":["LLIE: Low-Light Image Enhancement Network Based on FPGA"],"prefix":"10.1142","volume":"34","author":[{"ORCID":"https:\/\/orcid.org\/0009-0008-9935-5261","authenticated-orcid":false,"given":"Jiangtao","family":"Cui","sequence":"first","affiliation":[{"name":"Key Laboratory of Advanced Sensor and Integrated System, Tsinghua Shenzhen International Graduate School, Shenzhen, P. R. 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