{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,1]],"date-time":"2025-12-01T08:30:51Z","timestamp":1764577851596,"version":"3.46.0"},"reference-count":26,"publisher":"World Scientific Pub Co Pte Ltd","issue":"03","funder":[{"DOI":"10.13039\/501100004106","name":"East China Normal University","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100004106","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2026,2,15]]},"abstract":"<jats:p>In this paper, the main source of jitter in current-mode logic (CML) buffer is analyzed in detail: thermal noise-induced jitter, flicker noise-induced jitter, and power supply-induced jitter. It is observed that big tail current or big tail transistor will reduce the impact of the jitter source, assuming a perfect power supply. Based on the principle above, a 7\u00a0GHz 1:2 CML fanout buffer with low additive jitter is proposed. A low additive RMS jitter of 46.39\u00a0fs, with integration from 12\u00a0kHz to 20\u00a0MHz, is achieved at a carrier frequency of 622\u00a0MHz. Typically, the maximum channel\u2013channel skew, propagation delay, rise time, and fall time are 9.8\u00a0ps, 127\u00a0ps, 42.3\u00a0ps, and 38.6\u00a0ps, respectively. The proposed circuit dissipates 80\u00a0mA from a 3.3V supply voltage. Fabricated in 0.18\u00a0[Formula: see text]m BiCOMS technology, the active area of the proposed buffer is [Formula: see text].<\/jats:p>","DOI":"10.1142\/s0218126625504171","type":"journal-article","created":{"date-parts":[[2025,7,23]],"date-time":"2025-07-23T09:12:18Z","timestamp":1753261938000},"source":"Crossref","is-referenced-by-count":0,"title":["A 7 GHz, 1:2 CML Fanout Buffer with Low Jitter and Skew"],"prefix":"10.1142","volume":"35","author":[{"given":"Xirui","family":"Wang","sequence":"first","affiliation":[{"name":"School of Communication & Electronic Engineering, East China Normal University, No. 500, Dongchuan Road, Shanghai 200241, P. R. China"}]},{"given":"Shaokang","family":"Du","sequence":"additional","affiliation":[{"name":"School of Communication & Electronic Engineering, East China Normal University, No. 500, Dongchuan Road, Shanghai 200241, P. R. China"}]},{"given":"Jiapeng","family":"Shen","sequence":"additional","affiliation":[{"name":"School of Communication & Electronic Engineering, East China Normal University, No. 500, Dongchuan Road, Shanghai 200241, P. R. China"}]},{"given":"Yihan","family":"Qian","sequence":"additional","affiliation":[{"name":"School of Communication & Electronic Engineering, East China Normal University, No. 500, Dongchuan Road, Shanghai 200241, P. R. China"}]},{"given":"Xuanpeng","family":"Li","sequence":"additional","affiliation":[{"name":"School of Communication & Electronic Engineering, East China Normal University, No. 500, Dongchuan Road, Shanghai 200241, P. R. China"}]},{"given":"Junwei","family":"Yu","sequence":"additional","affiliation":[{"name":"School of Communication & Electronic Engineering, East China Normal University, No. 500, Dongchuan Road, Shanghai 200241, P. R. China"}]},{"given":"Yimin","family":"Liang","sequence":"additional","affiliation":[{"name":"School of Communication & Electronic Engineering, East China Normal University, No. 500, Dongchuan Road, Shanghai 200241, P. R. China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3843-6881","authenticated-orcid":false,"given":"Shengxi","family":"Diao","sequence":"additional","affiliation":[{"name":"School of Communication & Electronic Engineering, East China Normal University, No. 500, Dongchuan Road, Shanghai 200241, P. R. China"}]}],"member":"219","published-online":{"date-parts":[[2025,8,20]]},"reference":[{"key":"S0218126625504171BIB001","first-page":"562","volume":"68","author":"Wang C.-C.","year":"2021","journal-title":"IEEE Trans. Circuits Syst. II"},{"key":"S0218126625504171BIB002","first-page":"1381","volume":"68","author":"Razavi B.","year":"2021","journal-title":"IEEE Trans. Circuits Syst. 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