{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,4]],"date-time":"2026-03-04T03:23:05Z","timestamp":1772594585635,"version":"3.50.1"},"reference-count":34,"publisher":"World Scientific Pub Co Pte Ltd","issue":"07","funder":[{"name":"National Key Research and Development Plan: Development of Software Defined Interconnection Switch Chip for Multimodal Networks","award":["No. 2022YFB2901000"],"award-info":[{"award-number":["No. 2022YFB2901000"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2026,4]]},"abstract":"<jats:p>In the design of high-speed SerDes interface adaptive equalizer, the traditional LMS algorithm cannot achieve fast convergence and low steady-state error at the same time. Additionally, existing variable step-size algorithms exhibit high design complexity and poor algorithmic stability. Based on the above problems, this paper proposes an improved hybrid variable step-size LMS-MMSE algorithm, VssL-MMSE. First, to introduce optimal weight vectors, this paper exploits the low Bit Error Rate (BER) and fast convergence properties of the MMSE algorithm, thus overcoming the limitations of the LMS algorithm in complex channel variations. Second, by improving the Sigmoid function, this paper refines the nonlinear step-size adjustment principle, which simplifies the function structure and enhances the algorithm\u2019s stability. Finally, a dynamic adjustment function is developed for the optimal weights, effectively balancing real-time errors with theoretical optimal solutions. Theoretical analysis and simulation results demonstrate that the proposed algorithm has low computational complexity. In both high and low SNR environments, the algorithm exhibits faster convergence speed, lower steady-state error and greater stability compared to several other variable step-size algorithms. Under conditions of a data rate of 112 Gb\/s and channel attenuation of [Formula: see text], 25 and 12.5 dB, the effectiveness of its Inter-Symbol Interference (ISI) cancellation was verified through eye diagram comparison analysis, demonstrating its practicality in the design of high-speed SerDes adaptive equalizers.<\/jats:p>","DOI":"10.1142\/s0218126625504870","type":"journal-article","created":{"date-parts":[[2025,9,12]],"date-time":"2025-09-12T09:24:33Z","timestamp":1757669073000},"source":"Crossref","is-referenced-by-count":1,"title":["VssL-MMSE: A Variable Step-Size Optimization Algorithm for High-Speed SerDes Adaptive Equalizer"],"prefix":"10.1142","volume":"35","author":[{"ORCID":"https:\/\/orcid.org\/0009-0004-6458-5439","authenticated-orcid":false,"given":"Rui","family":"Zheng","sequence":"first","affiliation":[{"name":"Information Engineering University, 7 Jianxuejie, Zhengzhou, He\u2019nan, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-8926-9420","authenticated-orcid":false,"given":"Yu","family":"Shao","sequence":"additional","affiliation":[{"name":"Information Engineering University, 7 Jianxuejie, Zhengzhou, He\u2019nan, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0000-5647-043X","authenticated-orcid":false,"given":"Jianliang","family":"Shen","sequence":"additional","affiliation":[{"name":"Information Engineering University, 7 Jianxuejie, Zhengzhou, He\u2019nan, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-1608-6597","authenticated-orcid":false,"given":"Ping","family":"Lv","sequence":"additional","affiliation":[{"name":"Information Engineering University, 7 Jianxuejie, Zhengzhou, He\u2019nan, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6958-3537","authenticated-orcid":false,"given":"Zhengbin","family":"Zhu","sequence":"additional","affiliation":[{"name":"Information Engineering University, 7 Jianxuejie, Zhengzhou, He\u2019nan, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-5413-5268","authenticated-orcid":false,"given":"Bo","family":"Mei","sequence":"additional","affiliation":[{"name":"Information Engineering University, 7 Jianxuejie, Zhengzhou, He\u2019nan, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-7309-3329","authenticated-orcid":false,"given":"Dongpei","family":"Liu","sequence":"additional","affiliation":[{"name":"Information Engineering University, 7 Jianxuejie, Zhengzhou, He\u2019nan, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-5448-9752","authenticated-orcid":false,"given":"Zhichao","family":"Li","sequence":"additional","affiliation":[{"name":"Information Engineering University, 7 Jianxuejie, Zhengzhou, He\u2019nan, P. R. China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2025,11,17]]},"reference":[{"key":"S0218126625504870BIB001","first-page":"8","volume":"26","author":"Khairi A.","year":"2022","journal-title":"IEEE J. Solid-State Circuits"},{"key":"S0218126625504870BIB002","first-page":"1","volume":"25","author":"Lee S.","year":"2025","journal-title":"IEEE Trans. Compon. Packag. Technol."},{"key":"S0218126625504870BIB003","first-page":"518","volume":"13","author":"Bertsias P.","year":"2024","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"S0218126625504870BIB004","first-page":"1294","volume":"31","author":"Zou D.","year":"2024","journal-title":"Electronics"},{"key":"S0218126625504870BIB005","first-page":"201","volume":"27","author":"Tao B.","year":"2024","journal-title":"ICICM"},{"key":"S0218126625504870BIB006","doi-asserted-by":"publisher","DOI":"10.1109\/EWDTS63723.2024.10873709"},{"key":"S0218126625504870BIB007","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2023.3338002"},{"key":"S0218126625504870BIB008","doi-asserted-by":"publisher","DOI":"10.1109\/LPT.2022.3229032"},{"key":"S0218126625504870BIB009","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49661.2025.10904551"},{"key":"S0218126625504870BIB010","doi-asserted-by":"publisher","DOI":"10.1109\/ICOCN59242.2023.10236351"},{"key":"S0218126625504870BIB011","doi-asserted-by":"publisher","DOI":"10.1007\/s11276-025-03919-1"},{"key":"S0218126625504870BIB012","doi-asserted-by":"publisher","DOI":"10.1088\/1748-0221\/18\/08\/P08025"},{"key":"S0218126625504870BIB013","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3241929"},{"key":"S0218126625504870BIB014","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310204"},{"key":"S0218126625504870BIB015","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2216414"},{"key":"S0218126625504870BIB016","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3108969"},{"key":"S0218126625504870BIB017","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3170439"},{"key":"S0218126625504870BIB018","doi-asserted-by":"publisher","DOI":"10.1109\/TCPMT.2022.3158933"},{"key":"S0218126625504870BIB019","doi-asserted-by":"publisher","DOI":"10.1109\/JLT.2022.3225335"},{"key":"S0218126625504870BIB020","first-page":"1","author":"Resende D. F.","year":"2022","journal-title":"Proc. 2022 20th Int. Conf. Harmonics and Quality of Power"},{"key":"S0218126625504870BIB021","doi-asserted-by":"publisher","DOI":"10.1109\/IEEECONF59524.2023.10477017"},{"key":"S0218126625504870BIB022","doi-asserted-by":"publisher","DOI":"10.1002\/acs.3375"},{"key":"S0218126625504870BIB023","doi-asserted-by":"publisher","DOI":"10.1007\/s10489-022-03514-3"},{"key":"S0218126625504870BIB024","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2021.3085592"},{"key":"S0218126625504870BIB025","doi-asserted-by":"publisher","DOI":"10.3390\/sym13030481"},{"key":"S0218126625504870BIB026","doi-asserted-by":"publisher","DOI":"10.1016\/j.eswa.2021.116255"},{"key":"S0218126625504870BIB027","first-page":"70","volume":"44","author":"Zhou Y.","year":"2024","journal-title":"Ship Electron. Eng."},{"key":"S0218126625504870BIB028","first-page":"116","volume":"41","author":"Zhang J. W.","year":"2024","journal-title":"J. Commun."},{"key":"S0218126625504870BIB029","doi-asserted-by":"publisher","DOI":"10.1016\/B978-0-12-823898-1.00004-7"},{"key":"S0218126625504870BIB030","first-page":"291","volume":"37","author":"Hu Y. D.","year":"2020","journal-title":"Comput. Simul."},{"key":"S0218126625504870BIB031","doi-asserted-by":"publisher","DOI":"10.3390\/electronics12020257"},{"key":"S0218126625504870BIB032","doi-asserted-by":"publisher","DOI":"10.3390\/electronics11142199"},{"key":"S0218126625504870BIB033","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2023.3274213"},{"key":"S0218126625504870BIB034","first-page":"871","volume":"41","author":"Wang H. M.","year":"2022","journal-title":"Electron. Compon. Mater."}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126625504870","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,2,4]],"date-time":"2026-02-04T06:09:02Z","timestamp":1770185342000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/10.1142\/S0218126625504870"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,11,17]]},"references-count":34,"journal-issue":{"issue":"07","published-print":{"date-parts":[[2026,4]]}},"alternative-id":["10.1142\/S0218126625504870"],"URL":"https:\/\/doi.org\/10.1142\/s0218126625504870","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,11,17]]},"article-number":"2550487"}}