{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T18:39:44Z","timestamp":1648838384928},"reference-count":0,"publisher":"World Scientific Pub Co Pte Lt","issue":"03","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[1991,9]]},"abstract":"<jats:p> In this paper, we present Key-Updating Schemes in identity-based (identification or signature) systems, and consider the security of the schemes. We propose two kinds of key-updating schemes, i.e., one is sequential and the other is parallel, and show that both schemes are equivalent to each other in a polynomial time sense, i.e., there exists a deterministic polynomial time algorithm that transforms the sequential key-updating scheme to the parallel one, and vice versa. We also show that even if any polynomially many entities conspire to find a secret-key of any other entities, both key-updating schemes are provably secure against polynomially many times key-updating if decrypting RSA is hard. <\/jats:p>","DOI":"10.1142\/s0218126691000082","type":"journal-article","created":{"date-parts":[[2004,11,25]],"date-time":"2004-11-25T07:12:21Z","timestamp":1101366741000},"page":"257-272","source":"Crossref","is-referenced-by-count":0,"title":["PROVABLY SECURE KEY-UPDATING SCHEMES IN IDENTITY-BASED SYSTEMS"],"prefix":"10.1142","volume":"01","author":[{"given":"SHINJI","family":"SHINOZAKI","sequence":"first","affiliation":[{"name":"Department of Electrical and Electronic Engineering, Faculty of Engineering, Tokyo Institute of Technology, O-okayama, Meguro-ku, Tokyo 152, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"ATSUSHI","family":"FUJIOKA","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronic Engineering, Faculty of Engineering, Tokyo Institute of Technology, O-okayama, Meguro-ku, Tokyo 152, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"SHIGEO","family":"TSUJII","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronic Engineering, Faculty of Engineering, Tokyo Institute of Technology, O-okayama, Meguro-ku, Tokyo 152, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"TOSHIYA","family":"ITOH","sequence":"additional","affiliation":[{"name":"Department of Information Processing, The Graduate School at Nagatsuta, Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama 227, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2012,1,25]]},"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126691000082","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T19:21:45Z","timestamp":1565119305000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126691000082"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1991,9]]},"references-count":0,"journal-issue":{"issue":"03","published-online":{"date-parts":[[2012,1,25]]},"published-print":{"date-parts":[[1991,9]]}},"alternative-id":["10.1142\/S0218126691000082"],"URL":"https:\/\/doi.org\/10.1142\/s0218126691000082","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[1991,9]]}}}