{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,8,24]],"date-time":"2023-08-24T02:16:20Z","timestamp":1692843380582},"reference-count":0,"publisher":"World Scientific Pub Co Pte Lt","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[1991,12]]},"abstract":"<jats:p> A new procedure is given for the exact design of canonic LDI-type SC ladder filters realizing any elliptic discrete-time transfer function, including highpass functions. We show that, in contrast to known exact design procedures, the underlying prototype network should be terminated with so-called half-unit delays in order to preserve the capability of realizing any filter type. We will show, based on such ladder prototypes, simple and stray-insensitive LDI-type SC ladder filters can be derived, which are canonical for any filter type (i.e., every filter pole requires for its realization one stray-insensitive SC integrator without the need for additional amplifiers). Compared to common exact design procedures, simpler SC ladder structures are obtained, in particular, for highpass-type filters. Exact designs of canonic SC highpass ladder filters are presented and compared with corresponding biquad designs. <\/jats:p>","DOI":"10.1142\/s021812669100015x","type":"journal-article","created":{"date-parts":[[2004,11,25]],"date-time":"2004-11-25T07:12:21Z","timestamp":1101366741000},"page":"417-441","source":"Crossref","is-referenced-by-count":6,"title":["A NEW COMPREHENSIVE PROCEDURE FOR THE EXACT DESIGN OF CANONIC LDI-TYPE SC LADDER FILTERS"],"prefix":"10.1142","volume":"01","author":[{"given":"AUGUST","family":"KAELIN","sequence":"first","affiliation":[{"name":"Institute for Signal and Information Processing, Swiss Federal Institute of Technology, Zurich, ETH-Zentrum, CH-8092 Z\u00fcrich, Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"GEORGE S.","family":"MOSCHYTZ","sequence":"additional","affiliation":[{"name":"Institute for Signal and Information Processing, Swiss Federal Institute of Technology, Zurich, ETH-Zentrum, CH-8092 Z\u00fcrich, Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2012,1,25]]},"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S021812669100015X","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T10:33:26Z","timestamp":1565174006000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S021812669100015X"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1991,12]]},"references-count":0,"journal-issue":{"issue":"04","published-online":{"date-parts":[[2012,1,25]]},"published-print":{"date-parts":[[1991,12]]}},"alternative-id":["10.1142\/S021812669100015X"],"URL":"https:\/\/doi.org\/10.1142\/s021812669100015x","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[1991,12]]}}}