{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T19:42:24Z","timestamp":1648928544457},"reference-count":0,"publisher":"World Scientific Pub Co Pte Lt","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[1992,12]]},"abstract":"<jats:p> The effect of the low frequency false-lock phenomenon has been considered in sampled decision feedback Costas-loops used in BPSK direct sequence spread spectrum (DS SS) systems. This new physical phenomenon can occur in each arm-filtered nonlinear sampled PLL applying digital signal processing algorithms for phase detector implementations. This contribution provides details of calculation of false-locking phase detector characteristics of the sampled Costas-loops without and with hard-limited in-phase channel (the latter system will be referred to as sampled decision feedback loop) and analyzes different methods of filterless subharmonic false-lock detection. Besides in the case of white Gaussian noisy environment the phase detector characteristics at the false-lock frequencies, and the false alarm and false detection probabilities of the filterless subharmonic false-lock detectors are derived based on the new circuit models. The theoretical results have been checked by experimental implementations. <\/jats:p>","DOI":"10.1142\/s0218126692000222","type":"journal-article","created":{"date-parts":[[2004,11,24]],"date-time":"2004-11-24T19:50:24Z","timestamp":1101325824000},"page":"359-382","source":"Crossref","is-referenced-by-count":0,"title":["LOW FREQUENCY FALSE-LOCK PHENOMENON IN SAMPLED COSTAS-LOOPS"],"prefix":"10.1142","volume":"02","author":[{"given":"L.","family":"PAP","sequence":"first","affiliation":[{"name":"Department of Telecommunications, Technical University of Budapest, 2. Stoczek, Budapest, Hungary 1111, USA"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126692000222","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T22:46:46Z","timestamp":1565131606000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126692000222"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1992,12]]},"references-count":0,"journal-issue":{"issue":"04","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[1992,12]]}},"alternative-id":["10.1142\/S0218126692000222"],"URL":"https:\/\/doi.org\/10.1142\/s0218126692000222","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[1992,12]]}}}