{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T21:56:19Z","timestamp":1649109379678},"reference-count":0,"publisher":"World Scientific Pub Co Pte Lt","issue":"01","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[1994,3]]},"abstract":"<jats:p> A digit-serial squaring architecture based on radix-2<jats:sup>n<\/jats:sup> arithmetic is presented to carry out squaring digit serially. In this paper, the conventional binary squaring algorithm is modified and a radix-2<jats:sup>n<\/jats:sup> squaring algorithm which is used to design the proposed architectures is presented. The resulting basic cell is the Digital Controlled Add\/shiFt (DCAF) cell. The advantage of using radix-2<jats:sup>n<\/jats:sup> arithmetic is that it specifies the functionality of the DCAF cell only and, hence, there is no restriction on the type of adder to be used. It can be a ripple carry adder, a carry lookahead adder, a pipelined adder, or a carry-save adder. The merit of the new structure is that it provides system designers with a great deal of flexibility to find the best trade-off between cost and throughput by varying the radix, the type of adder to be used and\/or the number of pipelined stages. <\/jats:p>","DOI":"10.1142\/s0218126694000077","type":"journal-article","created":{"date-parts":[[2004,11,18]],"date-time":"2004-11-18T21:21:13Z","timestamp":1100812873000},"page":"99-108","source":"Crossref","is-referenced-by-count":1,"title":["DIGIT-SERIAL SQUARING ARCHITECTURE"],"prefix":"10.1142","volume":"04","author":[{"given":"A.E.","family":"BASHAGHA","sequence":"first","affiliation":[{"name":"Department of Electrical and Electronic Engineering, University of Nottingham, Nottingham NG7 2RD, UK"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.K.","family":"IBRAHIM","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronic Engineering, University of Nottingham, Nottingham NG7 2RD, UK"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126694000077","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T22:47:14Z","timestamp":1565131634000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126694000077"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994,3]]},"references-count":0,"journal-issue":{"issue":"01","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[1994,3]]}},"alternative-id":["10.1142\/S0218126694000077"],"URL":"https:\/\/doi.org\/10.1142\/s0218126694000077","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[1994,3]]}}}